Sr. ASIC Design Verification Engineer, Project Kuiper

A global technology company leading Project Kuiper, an initiative to launch low Earth orbit satellites for global broadband connectivity.
$143,300 - $247,600
Embedded
Staff Software Engineer
In-Person
5,000+ Employees
15+ years of experience
Space · Enterprise SaaS

Description For Sr. ASIC Design Verification Engineer, Project Kuiper

Project Kuiper is Amazon's ambitious initiative to revolutionize global connectivity through a constellation of Low Earth Orbit satellites. As a Sr. ASIC Design Verification Engineer, you'll join a groundbreaking team responsible for defining and implementing digital chip SOCs for satellite communications. This role offers a unique opportunity to shape wireless solutions with minimal legacy constraints, working at the forefront of space technology.

The position demands expertise in verification methodologies, particularly in communication systems. You'll be instrumental in developing sophisticated verification environments, implementing test plans, and ensuring the quality of complex ASIC designs. The role combines technical depth in verification with strategic collaboration across teams, including work with system architects, design engineers, and tool vendors.

This is an ideal opportunity for experienced verification engineers who want to make a significant impact on global connectivity. You'll be working with cutting-edge technology, including emulation platforms, formal verification tools, and modern verification methodologies like UVM and SystemC. The role offers competitive compensation, comprehensive benefits, and the chance to work on technology that will help connect underserved communities worldwide.

The position requires U.S. person status due to export control regulations and offers a competitive salary range of $143,300 to $247,600, depending on location and experience, plus additional benefits including equity and sign-on payments. Join Amazon's Project Kuiper team to be part of a mission that combines technical innovation with global impact.

Last updated 3 months ago

Responsibilities For Sr. ASIC Design Verification Engineer, Project Kuiper

  • Implement state of the art verification environment for RTL testing against reference Matlab/C models
  • Develop detailed test plans and write tests, run regressions, collect coverage matrices
  • Utilize emulation platform to improve pre-silicon verification flow
  • Collaborate with cross-functional teams for end-to-end integration testing
  • Work with tool vendors and drive enhancements in emulation methodology
  • Participate in FPGA validation using reusable test benches
  • Run formal verification of complex blocks
  • Develop automated regression environment

Requirements For Sr. ASIC Design Verification Engineer, Project Kuiper

Linux
  • Bachelor's degree in Electrical/Communications Engineering or Computer Science, or related field
  • 15+ years of experience in verification preferably in communication systems
  • 5+ years of experience in UVM, C, System C, and scripting
  • 3+ years of experience in emulation
  • Must be a U.S. citizen, U.S. permanent resident, or lawfully admitted refugee/asylee due to export control laws

Benefits For Sr. ASIC Design Verification Engineer, Project Kuiper

Medical Insurance
Dental Insurance
Vision Insurance
Equity
  • Full range of medical benefits
  • Financial benefits
  • Competitive base salary
  • Equity compensation
  • Sign-on payments

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