ASIC Design Engineer
Description For ASIC Design Engineer
Join Apple's innovative hardware team as an ASIC Design Engineer where you'll be at the forefront of creating sophisticated technology that impacts millions of users worldwide. As a member of our complex group, you'll work on unprecedented challenges in SOC design and implementation. The role offers an outstanding opportunity to craft upcoming products that will delight and encourage millions of Apple's customers every single day.
You'll be responsible for various aspects of SOC design, from writing microarchitecture specifications to implementing complex logic designs and integrating IPs. Working with a diverse team of specialists in SOC Design, Verification, Emulation, and Physical Design, you'll contribute to all front-end integration activities including Lint, CDC, Synthesis, and ECO.
Apple's environment is characterized by sophisticated, hard-working people and inspiring, innovative technologies. The team has a track record of reinventing entire industries with Apple Hardware products. The same passion for innovation extends to our practices, strengthening our dedication to leaving the world better than we found it.
The ideal candidate brings 3+ years of industry experience with strong expertise in Verilog RTL Logic Design. You should be comfortable working with multiple clock domains and asynchronous interfaces, and have comprehensive knowledge of chip development processes. Experience with system architecture, CPU & IP Integration, and power/clock management designs is highly valued.
Join a team that's transforming hardware technology and be part of creating the next excellent Apple product. Your work will directly impact millions of users while collaborating with world-class engineers in an environment that values innovation, quality, and technical excellence.
Responsibilities For ASIC Design Engineer
- Write microarchitecture and/or design specifications
- Design, implement, and debug complex logic designs
- Integrate complex IPs into the SOC
- Support front end integration activities including Lint, CDC, Synthesis, and ECO
- Work with SOC Design, SOC Design Verification, Emulation, STA, and Physical Design teams
- Collaborate with software and systems teams to ensure high quality
Requirements For ASIC Design Engineer
- BS and a minimum of 3 years relevant industry experience
- Verilog RTL Logic Design experience
- Experience with multiple clock domains and asynchronous interfaces
- Hands on experience in chip development process
- Proficiency in front end tools and methodologies
- Strong communication skills
- Knowledge of system architecture, CPU & IP Integration
- Familiarity with scripting languages like Perl, Python, or TCL
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