ASIC Design Engineer - Neural Engine DMA
Description For ASIC Design Engineer - Neural Engine DMA
As an ASIC Design Engineer in the Pixel IP DMA team at Apple, you will be at the center of the Pixel IP design effort to accelerate machine learning applications. You'll work closely with architecture, design, and verification teams to build commitment and low power DMA engines. Your responsibilities include:
- Coding high-quality RTL, with embedded assertions and cover points.
- Writing detailed micro-architectural specifications.
- Collaborating with multi-functional teams to explore solutions that enhance performance while minimizing power and area.
- Working closely with design verification and formal verification teams to debug and verify functionality and performance.
You'll apply your knowledge of flow control, arbitration, cache design, compression, pipelining, sequencers, and other techniques to coordinate moving large amounts of data between the memory subsystem and the Apple Neural Engine Core (ANE).
This role is part of Apple's Hardware Technologies group, where you'll help design next-generation, high-performance, power-efficient system-on-chips (SoCs). You'll be responsible for crafting and building the technology that fuels Apple's devices, ensuring they can seamlessly and efficiently handle tasks that make them beloved by millions.
Join Apple and make a critical impact in getting functional products to millions of customers quickly. This highly transparent role offers the opportunity to work on cutting-edge technology and contribute to products used worldwide.
Responsibilities For ASIC Design Engineer - Neural Engine DMA
- Coding high-quality RTL, with embedded assertions and cover points
- Writing detailed micro-architectural specifications
- Collaborating with multi-functional teams to explore solutions that enhance performance while minimizing power and area
- Working closely with design verification and formal verification teams to debug and verify functionality and performance
- Designing commitment and low power DMA engines
- Coordinating data movement between memory subsystem and Apple Neural Engine Core (ANE)
Requirements For ASIC Design Engineer - Neural Engine DMA
- Bachelor's degree + 3 Years of Experience
- Experience in SoC front-end ASIC RTL digital logic design using Verilog, or System Verilog
- Experience working multi-functionally with architecture, design, and verification teams
- Experience in front-end implementation tasks such as synthesis, timing, area/power analysis, linting, and logic equivalence checks
- Good collaboration skills with strong written and verbal communication skills
- Good understanding of flow control, arbitration, address translation, caching, on-chip interconnects, and performance analysis
Benefits For ASIC Design Engineer - Neural Engine DMA
- Comprehensive medical and dental coverage
- Retirement benefits
- Discounted products and free services
- Reimbursement for certain educational expenses
- Opportunity to become an Apple shareholder through discretionary employee stock programs
- Employee Stock Purchase Plan
- Potential eligibility for discretionary bonuses or commission payments
- Potential eligibility for relocation assistance
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