Circuits Physical Design Engineer

A leading technology company that designs and develops consumer electronics, software, and services.
$120,000 - $200,000
Embedded
Mid-Level Software Engineer
In-Person
5,000+ Employees
3+ years of experience
AI
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Description For Circuits Physical Design Engineer

Join Apple's Digital Design Engineering group as a Circuits Physical Design Engineer in an extraordinary opportunity to shape the future of processor design. This highly visible role puts you at the heart of SOC design efforts, where you'll collaborate with foundation IP developers on silicon validation, making critical impacts in delivering products to millions of customers. You'll be responsible for comprehensive library EDA view validation, taking P&R blocks through RTL to GDS steps, including physical synthesis, placement, CTS, routing, and timing optimization. The role involves working with cutting-edge technology, requiring expertise in PT/spice correlation, signal and power EM analysis, and IR analysis.

As part of the team, you'll have the opportunity to craft entirely new solutions, turning imaginative and revolutionary ideas into reality. You'll work with a team of hardworking engineers, applying engineering fundamentals to bring forward-thinking ideas to the real world. The position requires strong technical skills in ASIC integration flows, power distribution, and global signal planning, combined with hands-on experience in ECO implementation and DFT insertion.

This role offers the chance to work on groundbreaking technology that directly impacts customer experiences. You'll be part of Apple's commitment to innovation, working in a collaborative environment where your expertise in physical design engineering will contribute to developing next-generation processors. The position provides an excellent opportunity for professional growth while working with state-of-the-art tools and technologies in the heart of Silicon Valley's tech ecosystem.

Last updated 3 months ago

Responsibilities For Circuits Physical Design Engineer

  • Perform comprehensive library EDA view validation
  • Execute RTL to GDS steps including physical synthesis, placement, CTS, routing
  • Handle timing optimization, leakage recovery and closure & signoff
  • Conduct PT/spice correlation, signal and power EM analysis, IR analysis and PDV
  • Architect and compose blocks consisting of library cells for Silicon Validation
  • Collaborate with foundation IP developers on silicon validation

Requirements For Circuits Physical Design Engineer

  • BS and a minimum of 3 years of relevant industry experience
  • Strong understanding of RTL2GDSII flow and concepts
  • Experience with synthesis, place & route, CTS, timing convergence, layout closure
  • Familiar with block/partitions development for silicon validation of foundation IPs
  • Strong scripting skills using Perl/Tcl
  • Strong written/verbal communication skills

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