CPU MicroArchitect / RTL Engineer - Site Lead

Apple designs and develops innovative hardware products including iPhone, iPad, Watch, Vision Pro, and Mac.
$200,000 - $400,000
Embedded
Principal Software Engineer
In-Person
5,000+ Employees
15+ years of experience
AI · Consumer

Description For CPU MicroArchitect / RTL Engineer - Site Lead

Apple's Silicon Engineering Group (SEG) is seeking an experienced technical leader and manager to drive microarchitecture and RTL development for their high-performance, low-power microprocessors. This role offers an opportunity to work on groundbreaking products like iPhone, iPad, Watch, Vision Pro, and Mac. As a CPU MicroArchitect/RTL Engineer Site Lead, you'll lead the CPU RTL team while contributing to microarchitecture development, RTL design, and validation. The ideal candidate will have extensive experience in CPU architecture, particularly in areas such as instruction fetch/decode, branch prediction, out-of-order execution, and cache systems. You'll be responsible for mentoring team members, driving technical decisions, and ensuring delivery of complex microarchitecture implementations. The role combines technical expertise with leadership, requiring both hands-on engineering and team management skills. At Apple, you'll be part of a team that has revolutionized entire industries, working in an environment where innovation and excellence are the norm. The position offers the chance to impact millions of users worldwide through Apple's cutting-edge hardware products while working with some of the industry's best talent in silicon engineering.

Last updated 2 months ago

Responsibilities For CPU MicroArchitect / RTL Engineer - Site Lead

  • Microarchitecture development and specification from early high-level architectural exploration
  • RTL ownership – development, assessment and refinement of RTL design
  • Support test bench development and simulation for functional and performance verification
  • Performance exploration and correlation
  • Work with multifunctional engineering team to implement and validate physical design
  • Lead CPU RTL team at the site

Requirements For CPU MicroArchitect / RTL Engineer - Site Lead

Python
  • BS degree and 15+ years of relevant industry experience
  • Knowledge of microprocessor architecture
  • Knowledge of Verilog and/or VHDL
  • Experience with simulators and waveform debugging tools
  • Knowledge of logic design principles along with timing and power implications

Benefits For CPU MicroArchitect / RTL Engineer - Site Lead

Medical Insurance
401k
Equity
  • Equal opportunity employer
  • Innovative work environment
  • Work on cutting-edge technology

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