CPU Microarchitect/RTL Engineer - Fetch, Out of Order

Apple's Silicon Engineering Group (SEG) is seeking an experienced technical leader to drive architecture and RTL development of CPU front-end and/or out-of-order subsystem for their performant cores. As a CPU Microarchitect/RTL Engineer, you will be responsible for micro-architecture development and specification, RTL ownership, verification support, performance exploration and correlation, and design delivery. You'll work on high-performance strategies and collaborate with multifunctional engineering teams to implement and verify physical design aspects such as timing, area, reliability, testability, and power.

Key responsibilities include: • Developing and specifying micro-architecture from early high-level exploration to detailed specification • Owning RTL development, assessment, and refinement to meet power, performance, area, and timing goals • Supporting the verification team in test bench development, formal methods, and simulation/emulation • Exploring high-performance strategies and verifying RTL design performance • Collaborating with multifunctional teams on physical design implementation and verification

This role offers the opportunity to work on groundbreaking Apple products and be part of a team that has reinvented entire industries. Apple's commitment to innovation extends to their practices, aiming to leave the world better than they found it.