Custom Timing Engineer

A leading technology company known for innovative hardware and software products.
$150,000 - $250,000
Embedded
Principal Software Engineer
In-Person
5,000+ Employees
10+ years of experience
Hardware

Description For Custom Timing Engineer

Join Apple's Digital Design Engineering group as a Custom Timing Engineer, where you'll be at the forefront of hardware development. This role focuses on timing and designing sophisticated circuits that deliver extraordinary performance while maintaining low power consumption - a crucial aspect of Apple's outstanding products. As part of the custom digital circuits team, you'll work on timing models and methodology development, collaborating across multiple engineering disciplines. The position offers the opportunity to impact millions of devices, working with cutting-edge technology and innovative circuit topologies. You'll be responsible for enabling proper timing directives, bridging communication between circuit designers and tool developers, and developing crucial timing methodologies. This highly visible role requires extensive experience in transistor-level static timing analysis, expertise with industry-standard tools, and strong technical capabilities in circuit design and analysis. The role offers the chance to work with a talented team of engineers, contributing to Apple's next generation of hardware innovations while solving complex technical challenges in a collaborative environment.

Last updated 8 days ago

Responsibilities For Custom Timing Engineer

  • Enable global directives to ensure proper timing of innovative circuit topologies
  • Provide link between circuit designers, tool developers and chip level timing
  • Validate transistor level timing accuracy and timing test correctness
  • Develop timing methodology for high performance in small power envelope
  • Collaborate with hardware development teams

Requirements For Custom Timing Engineer

  • BS and a minimum of 10 years of relevant industry experience
  • Expertise in industry standard STA tools, Nanotime and Primetime
  • Experience in timing constraints generation & management
  • Familiarity with custom memory designs (SRAM/ register file / dynamic circuits)
  • Ability to perform spice simulations
  • Expertise in analyzing crosstalk delay and noise glitch
  • Good interpersonal skills
  • Scripting skills for flow automation (tcl)
  • Knowledge of industry standard circuit and design tools
  • MSEE preferred

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