Design Verification Engineer

At Apple, we work every single day to craft products that enrich people's lives. This role is for a digital-focused Design Verification (DV) engineer who will enable us to produce fully functional first silicon for IP designs. As a member of our wide-ranging group, you will have the rare and extraordinary opportunity to craft upcoming products that will delight and encourage millions of Apple's customers every single day.

Responsibilities include:

• Establishing DV methodology
• Test-plan development
• Verification environment development including stimulus and checkers
• Test-writing, debug, coverage
• Sign-off for RTL freeze and tape-out
• Ensuring bug-free first silicon for part of the SoC / IP
• Developing detailed test and coverage plans based on the micro-architecture
• Developing verification methodology suitable for the IP, ensuring a scalable and portable environment
• Developing verification plans for all features under your care
• Implementing verification plans, including design bring-up, DV environment bring-up, regression enabling all features
• Debugging test failures
• Developing block, IP and SoC level test-benches
• Tracking and reporting DV progress using various metrics, including bugs and coverage

This role offers the opportunity to work on cutting-edge technology and contribute to products used by millions of people worldwide. You'll be part of a team that values innovation, problem-solving, and attention to detail in creating high-quality hardware solutions.