Design Verification Engineer
Description For Design Verification Engineer
Apple is seeking a talented Design Verification Engineer to join their Hardware team in Cupertino. This role offers an exceptional opportunity to work on groundbreaking products that impact millions of customers worldwide. As a key member of the chip design effort, you'll collaborate across all disciplines in a vertical product model, working on challenges that haven't been solved before.
The position involves ensuring SOC quality, developing test methodologies, and working closely with design and micro-architecture teams. You'll be responsible for reviewing specifications, developing test coverage plans, and managing deliverables that align with project goals. The role requires expertise in CPU/SOC architecture, low-level programming, and verification methodologies.
Apple offers a competitive compensation package, including a base salary range of $121,900 to $183,600, plus additional benefits such as stock options, comprehensive healthcare, and educational support. The company's commitment to innovation extends beyond products to their practices, aiming to leave a positive impact on the world.
This is an excellent opportunity for someone with strong technical skills in embedded systems and verification, combined with excellent communication abilities and a passion for cutting-edge technology. You'll be working in an environment that values creativity, dedication, and the pursuit of excellence in hardware development.
Responsibilities For Design Verification Engineer
- Ensuring the quality of the SOC
- Working closely with the team to review specifications, develop attributes, tests & coverage plans, and define methodology & test benches
- Teaming up with the design and micro-architecture teams to understand the functional and performance goals of the design
- Work independently and manage deliverables to align with the project goals plus support cross-functional engineering efforts
Requirements For Design Verification Engineer
- BSEE/CS or MSEE/CS
- Knowledge of CPU&SOC architecture/design
- Low-level programming of complex computer systems in C/C++/assembly
- Coding in a scripting language, Perl, Python, Ruby, etc.
- Exposure to object oriented programming concepts
- Knowledge of industry standard interfaces, good understanding of Verilog, Verilog simulator and debug
- Strong problem solving and analytical skills
- Strong communication skills
Benefits For Design Verification Engineer
- Comprehensive medical and dental coverage
- Retirement benefits
- Employee stock programs
- Educational expense reimbursement
- Discretionary restricted stock unit awards
- Employee Stock Purchase Plan with discount
- Discretionary bonuses
- Relocation assistance
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