Design Verification Engineer
Description For Design Verification Engineer
Apple is seeking a Design Verification Engineer to join their hardware team in crafting innovative products that impact millions of customers. This role focuses on ensuring bug-free first silicon for IP designs, requiring expertise in pre-silicon verification, test-plan development, and verification environment creation. The position offers a comprehensive benefits package including stock options and medical coverage, with a competitive salary range of $135,400-$250,600. The ideal candidate will have 3+ years of experience, strong knowledge of SystemVerilog and verification methodologies, and the ability to develop scalable test environments. This is an opportunity to work on cutting-edge hardware solutions at one of the world's leading technology companies, contributing to products that define industry standards.
Responsibilities For Design Verification Engineer
- Develop detailed test and coverage plans based on the micro-architecture
- Develop verification methodology suitable for the IP
- Develop verification environment including stimulus, checkers, assertions, trackers, coverage
- Execute verification plans including design bring-up
- Develop block, IP and SoC level test-benches
- Track and report Design Verification progress
- Work closely with analog team to ensure overall bug-free IP design
Requirements For Design Verification Engineer
- BS degree in technical subject area
- Minimum 3 years of meaningful experience
- Solid understanding of SystemVerilog test-bench language and UVM
- Experience with verification methodologies and tools
- Working knowledge with scripting languages: Python, Perl, TCL
- Experience with serial protocols such as PCIe or USB
Benefits For Design Verification Engineer
- Comprehensive medical and dental coverage
- Retirement benefits
- Employee stock programs
- Education reimbursement
- Discretionary bonuses
- Relocation benefits
- Employee Stock Purchase Plan
- Discounted products and free services
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