DRAM Design Validation Engineer
Description For DRAM Design Validation Engineer
Join Apple's Silicon Technologies group as a DRAM Design Validation Engineer, where you'll play a crucial role in designing and manufacturing next-generation, high-performance, power-efficient processors and system-on-chip (SoC) solutions. This position offers an exciting opportunity to work at the forefront of memory technology, ensuring the successful integration of DRAM memories with SoC devices.
As a senior member of the team, you'll collaborate with design, verification, and integration engineers to define and implement memory controller and PHY requirements. Your expertise in DRAM cell architectures, memory organization, and periphery design will be essential in driving low-power solutions. You'll work closely with DRAM vendors to improve performance and power efficiency on Apple systems, while also contributing to future technology roadmaps.
The role requires a strong background in DRAM development, with expertise in simulation, interface verification, and failure analysis. You'll be responsible for ensuring both internal and external DRAM silicon and package level testing meets Apple's high standards. Your experience with LPDDR IO characterization and qualification will be valuable in maintaining Apple's commitment to excellence.
This position offers competitive compensation, including a base salary range of $165,500 to $293,800, plus additional benefits such as stock options, comprehensive healthcare, and education reimbursement. You'll be working at Apple's Cupertino location, collaborating with world-class engineers and contributing to products used by millions of people worldwide.
The ideal candidate combines technical expertise with excellent interpersonal skills, as you'll be working closely with various teams and vendors. Your contribution will directly impact the performance and efficiency of Apple's devices, making this an excellent opportunity for someone passionate about pushing the boundaries of memory technology in consumer electronics.
Responsibilities For DRAM Design Validation Engineer
- Work with design, verification and integration engineers to ensure memory controller and PHY requirements are well defined
- Collaborate with Architecture, MCU, DDRPHY and DRAM vendors for Apple's main memory feature
- Ensure DRAM simulation meets Apple's requirements
- Ensure internal and external DRAM silicon and package level testing needs are met
- Debug RMA material with apparent DRAM related defects
- Collaborate with DRAM vendors to improve performance and power on Apple systems
- Drive roadmaps and specs of memory vendors for next technology node devices
Requirements For DRAM Design Validation Engineer
- PhD or MS or BS Degree with 5+ years in DRAM development
- Expert in DRAM cell architectures
- Expert of DRAM memory organization and periphery design for low DRAM power
- Expertise in DRAM simulation
- Experience in memory interface verification
- Experience in LPDDR IO characterization and qualification
- Knowledge of DRAM reliability
- Experience in Failure Analysis of DRAM devices
- Programming experience in C/C++
- Excellent interpersonal skills and teamwork
Benefits For DRAM Design Validation Engineer
- Comprehensive medical and dental coverage
- Retirement benefits
- Employee stock programs
- Discounted products and free services
- Education reimbursement
- Discretionary bonuses
- Relocation assistance
- Employee Stock Purchase Plan
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