Join Apple's GPU FE Implementation team to optimize and deliver world-class GPUs for Apple Silicon. As a Graphics FE Implementation Engineer, you'll be responsible for PPA optimization of the netlist, working collaboratively with RTL and Physical design teams. You'll deliver key netlist quality milestones for your partition and improve current methodologies. This role involves crafting and building GPUs that enrich the lives of millions of people every day.
Key responsibilities include:
- PPA optimization of the netlist
- Collaborating with RTL and Physical design teams
- Delivering netlist quality milestones
- Improving current methodologies
- Contributing to the development of best-in-class GPUs for consumer products
Required qualifications:
- Experience with physical synthesis, including logic and PPA optimization techniques
- Experience with Verilog, System Verilog or other scripting languages
- Experience using logic equivalence tools for RTL and Gate-level designs
- BS + 3 years of relevant experience
Preferred qualifications:
- Understanding of physical design (PD) and static timing analysis (STA) principles
- Ability to analyze critical paths and guide RTL designs to optimal solutions
- Effective collaboration with IP teams across multiple sites
- Familiarity with DFT insertion
- Knowledge of reset domain, multi-clock domain, multi-power domain (UPF), linting tools and concepts across RTL and Gate-Level
- Experience implementing ECOs for functionality and timing
Apple is an equal opportunity employer committed to inclusion and diversity, taking affirmative action to ensure equal opportunity for all applicants regardless of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.