Graphics FE Integration Engineer
Description For Graphics FE Integration Engineer
Join Apple's Silicon Technologies group as a Graphics FE Integration Engineer and help design and manufacture next-generation, high-performance, power-efficient GPUs. As a member of the GPU FE Design integration team, you'll create GPU RTL by integrating various IPs following architectural parameters, physical constraints, DFT logic and power intent. This role combines hardware design expertise with software development, requiring deep knowledge of RTL integration, system architecture, and optimization techniques.
You'll work on critical components that power Apple's beloved devices, ensuring seamless performance and efficiency. The position demands strong technical skills in Verilog/System Verilog, scripting languages, and extensive experience with RTL analysis and PPA optimization tools. You'll collaborate with cross-functional teams across multiple sites, contributing to the development of cutting-edge GPU technology.
This role is perfect for someone who has a keen eye for detail, strong problem-solving abilities, and can work effectively under aggressive schedules. You'll be responsible for everything from RTL integration and debugging to authoring specifications and developing innovative methods to improve the front-end design integration process. The position offers the opportunity to work on technology that impacts millions of users worldwide while being part of Apple's prestigious hardware engineering team.
If you're passionate about hardware design, have extensive experience in GPU/CPU architecture, and want to contribute to products that define the future of technology, this role presents an exciting opportunity to make a significant impact at Apple.
Responsibilities For Graphics FE Integration Engineer
- RTL integration, assembly, partitioning, transformation and analysis
- Package, qualify and deliver FE design collateral
- Debug simulation failures and triage logic equivalence failures between designs
- Ensure implementation readiness with RTL lint, custom checks, unit level synthesis and clock/reset/power domain crossing checks
- Develop innovative methods to improve front-end design integration process
- Author design integration specification documents
- Review and signoff specifications for customers and IP providers
- Collaborate effectively with Architecture, IP, DV, SOC, DFT, and IMPL teams spanning multiple sites
Requirements For Graphics FE Integration Engineer
- BS + 10 years of experience
- Experience with Verilog/System Verilog
- Experience with Perl/Ruby/Python
- Knowledge of PPA optimization techniques, Power Intent (UPF/CPF), CDC, RDC, synthesis, physical design and STA
- Experience with RTL analysis and/or PPA optimization using Invio, LEC and Genus
- Familiarity with GPU/CPU/SIMD Architecture and micro-architecture
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