Mixed-Signal Clocking and Control RTL Design Engineer

A technology company dedicated to designing products that enrich the lives of users worldwide.
$143,100 - $264,200
Embedded
Senior Software Engineer
In-Person
5,000+ Employees
3+ years of experience
Enterprise SaaS · Hardware

Description For Mixed-Signal Clocking and Control RTL Design Engineer

Apple is seeking a Mixed-Signal Clocking and Control RTL Design Engineer to join their Hardware team in developing groundbreaking products. This role focuses on designing sophisticated logic systems for calibrating and controlling circuits, requiring expertise in digital logic, SystemVerilog, and complex clock domain implementations. The position offers an opportunity to work on cutting-edge technology that impacts millions of users worldwide, while collaborating with system architects and verification teams. The role combines hardware design, signal processing, and control systems, making it ideal for engineers passionate about pushing technological boundaries. Working at Apple provides comprehensive benefits, competitive compensation including stock options, and the chance to contribute to industry-leading products. The position requires both technical expertise and collaborative skills, offering significant growth potential in a dynamic environment.

Last updated a month ago

Responsibilities For Mixed-Signal Clocking and Control RTL Design Engineer

  • Design logic used to calibrate and control circuits such as oscillators, delay lines and phase interpolators
  • Work with multiple clocks and complex clock domain crossings
  • Analyze control loops for critical parameters such as gain, latency, transients and jitter
  • Work with static timing experts for timing closure
  • Work with system architects to determine implementation of new designs
  • Work with design verification teams to craft/debug tests
  • Contribute to post-silicon debug and analysis

Requirements For Mixed-Signal Clocking and Control RTL Design Engineer

  • MS degree in technical discipline with minimum of 3 years of relevant experience
  • Excellent knowledge of digital logic gates, clocking and state elements
  • Excellent knowledge of writing synthesizable code in SystemVerilog
  • Solid understanding of logic and behavioral simulations
  • Working knowledge of STA/Lint/CDC/RDC tools
  • Solid understanding of clocking fundamentals such as jitter, phase and frequency modulation
  • Good understanding of phase and frequency detectors, oscillators, delays line and phase interpolators

Benefits For Mixed-Signal Clocking and Control RTL Design Engineer

Medical Insurance
Dental Insurance
401k
Equity
Education Budget
Relocation Benefits
  • Comprehensive medical and dental coverage
  • Retirement benefits
  • Employee stock programs
  • Discretionary restricted stock unit awards
  • Employee Stock Purchase Plan with discount
  • Educational expense reimbursement
  • Discretionary bonuses
  • Relocation benefits
  • Range of discounted products and free services

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