PHY RTL Design Engineer
Description For PHY RTL Design Engineer
Apple is seeking a talented PHY RTL Design Engineer to join their growing wireless silicon development team. This role is part of their wireless SOC organization, which is responsible for all aspects of wireless silicon development, with a particular focus on highly energy-efficient design and innovative technologies that enhance user experience at the product level.
The position offers an opportunity to work with a world-class vertically integrated engineering team that spans multiple disciplines including RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering.
As a PHY RTL Design Engineer, you will be responsible for developing signal processing intensive designs for wireless communication SoCs. This includes writing specifications, defining microarchitecture based on MATLAB/C system models, and architecting area and power-efficient low latency designs. You'll work closely with algorithm and software teams to ensure optimal performance and power efficiency.
The ideal candidate should have at least 10 years of industry experience in wireless PHY design engineering, with strong expertise in fixed-point knowledge and bit-true cycle-accurate verifications. Understanding of various decoders (Viterbi, LDPC, Polar), filter design, and modern energy-efficient design techniques is crucial.
Apple offers a competitive compensation package, including a base salary range of $175,800 to $312,200, plus opportunities for stock ownership through various employee stock programs. Additional benefits include comprehensive medical and dental coverage, retirement benefits, education reimbursement, and potential bonuses or relocation assistance.
This role provides an excellent opportunity to work on cutting-edge wireless technologies while being part of Apple's innovative engineering team. The position requires a combination of technical expertise, collaborative skills, and the ability to deliver under ambitious schedules. If you're passionate about wireless communication technology and want to contribute to products that transform user experiences, this role offers an exciting career opportunity at one of the world's leading technology companies.
Responsibilities For PHY RTL Design Engineer
- Write specifications and define Microarchitecture based on MATLAB/C system model
- Architect area and power-efficient low latency designs with scalabilities and flexibilities
- Work with algorithm and software team to ensure performance and power efficiency
- Develop power and area efficient RTL logic design, and provide DV support
- Run tools to ensure lint and CDC/RDC clean design
- Handle synthesis and timing constraints
- Design signal processing for wireless protocols
Requirements For PHY RTL Design Engineer
- BS and 10+ years of relevant industry experience
- Strong fixed-point knowledge and extensive experience with bit-true cycle-accurate verifications
- Understanding of Decoders - Viterbi, LDPC, Polar
- Understanding of Filter design, multi-radix implementation
- Knowledge in modern design techniques and energy-efficient/low power logic design
- Familiarity with power estimation and modeling
- Solid understanding of wireless standards (IEEE 802.11, 802.15, Bluetooth or 3GPP)
- Background in computer architecture
- Experience with bus fabric (APB/AHB/AXI)
- Experience with power management with multiple power domains
- Proven track record in high-volume production
- Excellent communication skills
- Experience with FPGA and/or emulation platform
Benefits For PHY RTL Design Engineer
- Comprehensive medical and dental coverage
- Retirement benefits
- Employee stock programs
- Education reimbursement
- Discretionary restricted stock unit awards
- Employee Stock Purchase Plan
- Discretionary bonuses
- Relocation assistance
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