Physical Design Engineer
Description For Physical Design Engineer
Apple is seeking a forward-thinking Physical Design Engineer to join their Hardware team in crafting innovative products that impact millions of customers. This role places you at the heart of PHY design efforts, collaborating with architecture, CAD, timing, and logic design teams. You'll be responsible for all phases of physical design of high-performance PHY design from RTL to final GDSII delivery. The position demands expertise in chip-level design, including floor-planning, power grid implementation, clock network optimization, and physical verification. You'll work on cutting-edge challenges that require innovative solutions, contributing to Apple's mission of creating products that enrich people's lives. The role offers the unique opportunity to work on upcoming products with significant impact, requiring deep technical knowledge in physical design, verification methodologies, and industry-standard tools. As a senior member of the team, you'll also help establish design methodologies and contribute to flow development for chip integration. This position combines technical expertise with the excitement of working on products that will delight millions of Apple customers worldwide.
Responsibilities For Physical Design Engineer
- Generate block/chip level static timing constraints
- Build full chip floor-plan including pin placement, partitions and power grid
- Develop and validate high performance low power clock network guidelines
- Perform block level place and route and close the design to meet timing, area and power constraints
- Generate and Implement ECOs to fix timing, noise and EM IR violations
- Run Physical Design verification flow at chip/block level
- Provide guidelines to fix LVS/DRC violations to other designers
- Participate in establishing CAD and physical design methodologies
- Assist in flow development for chip integration
Requirements For Physical Design Engineer
- Bachelors of Science in Electrical Engineering
- Deep design experience in high PHY and/or SOC designs
- Deep Knowledge about industry standards and practices in Physical Design
- Experience in developing and implementing Power-grid and Clock specifications
- Strong understanding of all aspects of Physical construction, Integration and Physical Verification
- Knowledge of Basic SoC Architecture and HDL languages like Verilog
- Deep Understanding of scripting languages such as Perl/Tcl
- Solid understanding of Extraction and STA methodology and tools
- Deep Understanding of Physical Design Verification methodology
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