Power UPF Methodology Engineer

Join Apple's Digital Design Engineering group as a Power UPF Methodology Engineer, where you'll be at the forefront of crafting innovative solutions for state-of-the-art ASICs. This role places you at the center of SOC design efforts, working on transistor level power ERC sign-off and power intent-UPF implementation & verification for mobile SOCs. You'll collaborate with cross-functional teams to bring forward-thinking ideas to life and ensure robust power sign-off methodology for next-generation mobile products.

As part of this exciting position, you'll work with a team of dedicated engineers to develop and implement power verification solutions that impact millions of customers. Your responsibilities will span from driving mixed signal IP power ERC verification to establishing new power ERC frameworks for cutting-edge projects. The role requires a unique blend of technical expertise in ASIC design methodology and strong collaborative skills.

The position offers competitive compensation, including base pay, stock options, and comprehensive benefits. You'll be part of Apple's innovative hardware team, contributing to groundbreaking mobile SOC designs while working with industry-leading technologies and methodologies. This is an exceptional opportunity for someone passionate about power design methodology who wants to make a significant impact on next-generation Apple products.

The role combines technical depth with strategic importance, requiring both engineering expertise and strong communication skills. You'll work with various teams, from CAD to physical design verification, making this an ideal position for someone who enjoys cross-functional collaboration and complex problem-solving in a dynamic environment.