RFIC - PLL Design Engineer
Description For RFIC - PLL Design Engineer
Apple's wireless RFIC team is seeking a talented RFIC-PLL Design Engineer to join their innovative hardware division. This role sits at the intersection of cutting-edge wireless technology and product development, where you'll be instrumental in crafting sophisticated radio transceivers integrated into wireless SoCs.
As part of Apple's vertically integrated engineering team, you'll work on groundbreaking projects that push the boundaries of wireless systems performance. The position offers an unique opportunity to impact hundreds of millions of Apple products through your work on wireless connectivity solutions. You'll be responsible for providing analog and digital PLL solutions for wireless SoC and driving them to mass production.
The role demands expertise in RF/analog and mixed-signal design, with specific focus on fractional N Synthesizers, Digital PLLs, and Analog PLLs. You'll work closely with multi-functional teams, including platform architecture, wireless design, RF HW, and SW teams, to define and implement radio features that enable wireless innovation.
Key responsibilities include leading radio transceiver chain design, driving radio KPI optimization, working on block-level specifications, and ensuring successful tape-out through careful floorplan layout and verification. You'll also be involved in silicon measurements correlation and ensuring compliance with volume production specifications.
The position offers competitive compensation, including a base salary range of $135,400 to $250,600, plus additional benefits such as stock options, comprehensive healthcare, and educational support. This is an excellent opportunity for experienced professionals who are passionate about pushing the limits of wireless technology and want to make a significant impact in a world-class organization.
The ideal candidate will have at least 3 years of relevant industry experience, strong expertise in RF CMOS design, and proficiency with industry-standard tools like Cadence Virtuoso and Matlab. If you're excited about working at the forefront of wireless technology and being part of a team that shapes the future of Apple's wireless connectivity solutions, this role offers the perfect platform for your career growth.
Responsibilities For RFIC - PLL Design Engineer
- Lead design of radio transceiver chains including analog PLLs - VCOs, digital PLLs - DCOs, LOGen
- Drive radio KPI (power, area, performance) to meet product requirements
- Work with multi-functional teams to define radio features enabling wireless innovation
- Work closely with RF Systems on block-level and high-level specifications
- Hands-on design contributions from concept to actual design and simulations
- Responsible for floorplan layout and verification of the design
- Provide design versus silicon measurements correlation
Requirements For RFIC - PLL Design Engineer
- BS and 3+ years of relevant industry experience
- Experience with RF/analog and mixed-signal design experience in groundbreaking RF CMOS design
- Experienced in design and development of fractional N Synthesizers, Digital PLLs, Analog PLLs, and LO-Gen
- Hands-on experience designing TDC, GRO, Digital Filters, Sigma Delta Modulators, Pre-scalers, MMD, DCOs, PFD-CP, and VCOs
- Skilled in using Cadence Virtuoso, Spectre RF, Matlab, and EM simulation tools
- Familiarity with mixed-signal verification methodologies
Benefits For RFIC - PLL Design Engineer
- Comprehensive medical and dental coverage
- Retirement benefits
- Employee stock programs
- Educational expense reimbursement
- Discretionary restricted stock unit awards
- Employee Stock Purchase Plan
- Discretionary bonuses
- Relocation benefits
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