SoC DFT Engineer
Description For SoC DFT Engineer
Join Apple's Silicon Technologies group as a SoC DFT Engineer and be part of designing and manufacturing next-generation, high-performance, power-efficient processors and system-on-chip solutions. This highly visible role puts you at the center of semiconductor design efforts, collaborating across all subject areas with a critical impact on delivering functional products to millions of customers.
As a DFT engineer, you'll be responsible for the complete DFT solution for design projects, spanning all aspects of semiconductor design. Your work will directly contribute to Apple's ability to create sophisticated solutions for highly complex challenges in processor and SoC design. You'll work closely with various teams, including design verification, test engineers, and designers, to ensure the successful implementation and verification of DFT architectures.
The role requires expertise in industrial standards and practices in DFT, including ATPG, JTAG, and MBIST, along with strong knowledge of hardware description languages like Verilog and VHDL. You'll be involved in everything from developing DFT specifications and architectures to debugging complex issues and conducting silicon debug experiments.
This position offers the opportunity to work on cutting-edge technology that powers Apple's beloved devices, ensuring they can seamlessly and efficiently handle tasks that millions of users depend on. You'll be part of a team that's dedicated to crafting and building the technology that fuels Apple's innovative products, making a direct impact on the user experience of customers worldwide.
Join us in this role to be part of a team that values attention to detail, technical excellence, and collaborative problem-solving, while working on some of the most advanced semiconductor technology in the industry.
Responsibilities For SoC DFT Engineer
- Developing and implementing DFT architecture
- Implementing DFT infrastructure
- Working with the DV team to verify DFT implementations and implement ECOs
- Generating structural test vectors and analyzing and improving coverage
- Working with designers on STA, physical, power and logical issues
- Working with test engineers to bring up test vectors on silicon
- Running schedules and supporting multi-functional engineering efforts
Requirements For SoC DFT Engineer
- BS and a minimum of 3 years relevant industry experience
- Knowledge about industrial standards and practices in DFT, including ATPG, JTAG, MBIST
- Experience developing DFT specifications and driving DFT architecture
- Knowledge of Verilog and/or VHDL
- Experience with simulators and waveform debugging tools
- Understanding of design verification (DV) methodologies
- Experience in debugging Compressed ATPG patterns, MBIST, and JTAG/1500
- Experience with STA constraints development and analysis
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