SoC Physical Design Verification Engineer

A technology company that designs and manufactures consumer electronics, software, and services.
$150,000 - $250,000
Embedded
Staff Software Engineer
In-Person
5,000+ Employees
10+ years of experience
Hardware

Description For SoC Physical Design Verification Engineer

Apple's Silicon Technologies group is seeking a skilled SoC Physical Design Verification Engineer to join their team in crafting next-generation, high-performance, power-efficient processors and system-on-chip solutions. This role is crucial in ensuring Apple's products maintain their excellence through rigorous verification processes.

As a Physical Design Verification Engineer, you'll be responsible for performing various types of physical verification checks at both chip and block levels. Your expertise will be essential in collaborating with CAD/Technology teams for flow validation and working closely with implementation teams throughout the chip design cycle.

The position requires a deep understanding of ASIC physical design, verification flows, and industry-standard tools like Mentor Calibre and Synopsys ICV. You'll be working with cross-functional teams, leading schedules, and driving signoff closure for tapeout. Your work will directly impact the development of Apple's cutting-edge devices that are used by millions of customers worldwide.

This is an opportunity to join a company known for its innovation and attention to detail. You'll be part of a team that values elegant solutions to complex challenges and ensures every aspect of Apple's hardware meets the highest standards of quality and performance. The role offers the chance to work on technology that powers some of the world's most popular devices while collaborating with industry-leading professionals in silicon design.

If you're passionate about hardware design, have extensive experience in physical verification, and want to contribute to products that enrich people's lives, this role at Apple's Silicon Technologies group could be your next career milestone.

Last updated 36 minutes ago

Responsibilities For SoC Physical Design Verification Engineer

  • Perform physical verification checks (LVS, DRC, ANT, ESD) at chip and block level
  • Collaborate with CAD/Technology teams for flow bring up and validation
  • Lead schedules and support cross-functional engineering efforts
  • Work on padring, bump, RDL design with package and floorplan teams

Requirements For SoC Physical Design Verification Engineer

  • BS in Electrical/Electronics/Computer Engineering or related field
  • 10+ years of relevant industry experience
  • Direct experience with physical verification flows, methodology, and setup
  • Knowledge of all aspects of ASIC physical design
  • Knowledge of place and route design flow methodology
  • Scripting skills for debugging flow related issues
  • Experience with tools like Mentor Calibre, Synopsys ICV
  • Full chip tapeout experience
  • Physical design verification and debug experience with mixed signal and digital IP integrations

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