Apple's Low Power group within Silicon Technologies is seeking a SoC Power Flow Methodology Engineer to help deliver cutting-edge technology for low-power chip design. This role offers an exciting opportunity to work on highly visible products used by millions of people daily. As a Power Flow Methodology Engineer, you'll be responsible for developing automated solutions and capabilities that make chips more power efficient than ever before.
The position involves working with complex challenges in chip design, focusing on power analysis, optimization, and verification flows. You'll be part of a dynamic team that creates and implements new low-power methodologies across various future technologies. The role combines technical expertise in VLSI designs and SOC design flows with software development skills.
This is an excellent opportunity for someone with a strong background in both hardware and software development. You'll work with cutting-edge technology while contributing to products that have a global impact. The role offers competitive compensation, comprehensive benefits, and the chance to become an Apple shareholder through various stock programs.
The ideal candidate should have at least 3 years of experience, strong programming skills in languages like Python and Java, and excellent communication abilities. Knowledge of Tcl/Perl, EDA tools, and low-power concepts such as UPF is advantageous. You'll be working in Cupertino, collaborating with talented teams while helping shape the future of Apple's chip technology.