SoC Power Modeling Engineer

As a SoC Power Modeling Engineer at Apple, you'll be part of the Silicon Engineering group, responsible for designing state-of-the-art ASICs integral to many Apple products. Your focus will be on modeling power dissipation of various IPs, including AI/ML, power rails, peak current requirements, and voltage-frequency operating points for upcoming generations of Apple SOCs.

Key responsibilities include:

• Modeling power dissipation and power delivery
• Establishing voltages for DVFM states of IPs (Neural Engines, CPUs, Graphics, AI/ML accelerators, media IPs, caches, and fabric)
• Modeling power dissipation for customer use-cases
• Interacting with Technology, Silicon Validation, and Product Engineering teams to establish voltage-frequency design points
• Working with power lab and test teams to correlate models to hardware data

You'll collaborate across many teams, including architecture, design, thermals, PMIC, and system design. This role offers an opportunity to participate in optimizing leading-edge chips for power efficiency and contribute to innovative products reaching millions of customers.

The ideal candidate should have 3+ years of relevant experience, programming skills, and an understanding of low-power digital design and power fundamentals. Additional preferred qualifications include:

• Understanding of SOC power modeling and current demand
• Knowledge of electrical properties of on-die PDN, power gating, package, and system power delivery
• Scripting and data analysis skills, experience with EDA tools
• Understanding of VLSI design flow and CMOS technology
• Extensive background in Electrical Engineering
• Ability to understand and model thermal control loops and throttling mechanisms
• Familiarity with physical design tools for power optimization
• Excellent teamwork and communication skills

This role provides an exciting opportunity to work on cutting-edge technology and contribute to Apple's innovative product lineup.