SoC Power Modeling Engineer
Description For SoC Power Modeling Engineer
Apple's Silicon Engineering group is seeking a SoC Power Modeling Engineer to join their innovative team designing state-of-the-art ASICs for various Apple products. This role focuses on modeling power dissipation of various IPs, including AI/ML components, power rails, and voltage-frequency operating points for next-generation Apple SOCs. The position offers a unique opportunity to work on power-efficiency optimization for cutting-edge chips while collaborating with multiple teams including architecture, design, thermals, PMIC, and system design.
The role involves detailed work with power and current profiles modeling for various SOC IPs and determining optimal voltage-frequency operating points. You'll be working closely with lab and silicon characterization/validation teams to ensure model accuracy against hardware data. This position is perfect for someone passionate about power optimization in complex silicon designs and eager to impact millions of customers through innovative product development.
As part of Apple's hardware team, you'll be contributing to the development of some of the most advanced mobile and computing platforms in the industry. The role requires a strong background in electrical engineering, power modeling, and digital design, combined with excellent analytical and communication skills. You'll be working in a collaborative environment where your expertise will directly influence the power efficiency and performance of future Apple products.
The position offers competitive compensation, comprehensive benefits, and the opportunity to work with cutting-edge technology at one of the world's most influential tech companies. If you're passionate about power optimization, have a strong technical background, and want to be part of creating the next generation of Apple's silicon technology, this role provides an excellent opportunity to make a significant impact.
Responsibilities For SoC Power Modeling Engineer
- Modeling power dissipation and power delivery
- Establishing voltages for DVFM states of IPs, including Neural Engines, CPUs, Graphics, compute (AI/ML) accelerators, media IPs, caches and fabric
- Modeling power dissipation for customer use-cases
- Interacting with Technology team, Silicon Validation, and Product Engineering teams to establish voltage-frequency design points
- Working with power lab and test teams to correlate models to HW data
Requirements For SoC Power Modeling Engineer
- Bachelor's degree in relevant field
- 3+ years of relevant industry experience
- Understanding of SOC power modeling and current demand
- Understanding of electrical properties of on-die PDN, power gating, package and system power delivery
- Skills in scripting, data analysis and experience with EDA tools
- Understanding of VLSI design flow and CMOS technology
- Extensive background in EE
- Ability to understand and model thermal control loops and throttling mechanisms
- Familiarity with physical design tools for power optimization
- Great teammate and excellent communication skills
Benefits For SoC Power Modeling Engineer
- Comprehensive medical and dental coverage
- Retirement benefits
- Employee stock programs
- Discounted products and free services
- Education reimbursement
- Discretionary bonuses
- Relocation assistance
- Employee Stock Purchase Plan
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