SOC Verification Engineer
Description For SOC Verification Engineer
Apple's wireless SOC organization is seeking a talented SOC Verification Engineer to join their growing wireless silicon development team. This role is integral to the development of wireless silicon solutions, focusing on energy-efficient design and transformative technologies. As a SOC Verification Engineer, you'll be responsible for pre-silicon RTL verification at both block and top-level SOC, working with a world-class team spanning RF/Analog architecture, Systems/PHY/MAC design, VLSI/RTL design, and more.
The position requires deep understanding of SOC architecture and meticulous attention to detail. You'll collaborate across all disciplines to develop reusable testbenches and verification environments using cutting-edge methodologies. The role involves creating verification plans, developing test benches, generating tests, and managing coverage models.
Working at Apple, you'll be part of a team that's pushing the boundaries of wireless technology. The compensation package includes competitive base pay, stock options, comprehensive benefits, and opportunities for professional growth. The role offers exposure to industry-leading projects and the chance to work with some of the best minds in silicon development.
This is an excellent opportunity for an experienced verification engineer looking to make a significant impact in the development of next-generation wireless technologies. You'll be working in Sunnyvale, contributing to products that millions of people use daily, while enjoying Apple's comprehensive benefits package and professional development opportunities.
Responsibilities For SOC Verification Engineer
- Understand details of different types of architecture and build block/chip level testbench
- Create detailed verification plan from specification
- Develop reusable block/IP level test bench and support IP integration verification
- Generate directed and ingenuous constrained random tests
- Create/analyze coverage model and enhance testbench/test to increase coverage
- Build automated flows for block and chip level verification
- Debug failures, manage bug tracking, and close coverage
- Hold detailed verification reviews and set standard for coding quality
- Work closely with team members to improve methodology and flow
Requirements For SOC Verification Engineer
- BS with 10+ years relevant experience
- Expertise in HVL and HDL (System Verilog, Verilog)
- Advanced knowledge of HVL methodology (UVM/OVM/VMM)
- Solid verification skills in problem solving, constrained random testing, and debugging
- Solid understanding of reusable verification framework
- Knowledge of digital logic design, chip architecture and microarchitecture
- Great teammate with excellent communication skills
Benefits For SOC Verification Engineer
- Comprehensive medical and dental coverage
- Retirement benefits
- Employee stock programs
- Educational expense reimbursement
- Discretionary bonuses
- Relocation assistance
- Employee Stock Purchase Plan
- Discounted products and free services
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