Find Astera Labs Senior Software Engineer software engineering jobs

Astera Labs is a global leader in purpose-built connectivity solutions that unlock the full potential of AI and cloud infrastructure.

Astera Labs is seeking a Senior Physical Design Engineer to join their team in Bengaluru, India. The ideal candidate will have a strong background in electrical engineering or computer science, with at least 5 years of experience in complex SoC/silicon product development for Server, Storage, and/or Networking applications.

Key responsibilities include:
- Driving multiple complex designs from architecture to GDSII at both full chip and block levels
- Expertise in synthesis, timing closure, and formal verification
- Working with Cadence and/or Synopsys physical design tools/flows
- Collaborating with IP vendors for both RTL and hard-mac blocks

Required skills and qualifications:
- Bachelor's degree in EE / Computer Science (Master's preferred)
- Hands-on knowledge of synthesis, place and route, timing, extraction, and other backend tools for 16nm or less technologies
- Experience with System Verilog/Verilog
- Familiarity with DFT tools and techniques
- Strong scripting skills in Python or Perl

The ideal candidate will have an entrepreneurial mindset, ability to prioritize tasks, and work with minimal supervision. Experience with DFT test coverage, debug, and ECO methodologies is a plus.

Astera Labs offers a dynamic work environment focused on innovation in AI and cloud infrastructure. Join a team that values diversity and is transforming modern data-driven applications.

Senior Physical Design Engineer role at Astera Labs, focusing on complex SoC/silicon product development for AI and cloud infrastructure.

Senior Physical Design Engineer

Astera Labs is seeking a Senior DFT (Design For Test) Engineer to join their DFT Design team. This role involves developing next-generation connectivity products for leading cloud service providers and server/networking OEMs. The position offers exposure to the full product life-cycle and requires close collaboration with various engineering teams.

Key Responsibilities:
- Develop DFT solutions for complex semiconductor designs
- Work on chip design, verification, and test generation
- Collaborate with multiple engineering teams throughout the product lifecycle
- Implement and optimize test compression techniques
- Conduct gate-level simulations and static timing analysis

Required Qualifications:
- Bachelor's degree in Computer Engineering or Electrical Engineering
- 5+ years of experience as a DFT engineer in a semiconductor company
- Expertise in chip design, Verilog, and System Verilog
- Proficiency in UVM methodology and ATPG tools
- Experience with scan insertion tools and test compression software
- Strong knowledge of DFT techniques (JTAG, ATPG, test pattern translation, yield learning, logic diagnosis)
- Familiarity with ATE and commercial test generation tools
- Scripting skills (Perl/Tcl)

Preferred Experience:
- SOC level verification on large designs
- Working with 93k Tester
- Knowledge of IEEE 1500 Standard or IEEE 1687 standard
- Experience with MBIST and LBIST

Astera Labs values diversity and encourages applications from people of color, LGBTQ+ individuals, veterans, parents, and individuals with disabilities. The company offers a competitive salary based on location and experience.

Join Astera Labs to work on cutting-edge connectivity solutions and be part of a team transforming modern data-driven applications.

Senior DFT Engineer role at Astera Labs, developing next-gen connectivity solutions for AI and cloud infrastructure.

Astera Labs Senior Software Engineer Software Engineering Jobs

Find Astera Labs Senior Software Engineer software engineering jobs