ASIC Digital Physical Design Engineer
Description For ASIC Digital Physical Design Engineer
Broadcom, a global technology leader in semiconductor and infrastructure software solutions, is seeking an experienced ASIC Digital Physical Design Engineer for their San Jose office. This role requires deep expertise in physical design, working with cutting-edge TSMC technology nodes (7nm-2nm). The position offers a comprehensive compensation package including a competitive base salary range of $141,000 - $225,000, plus bonus and equity opportunities.
The ideal candidate will possess advanced education in Electrical or Computer Engineering with extensive experience in physical design. Key responsibilities include managing design tape-outs, implementing power-grid and clock constraints, and ensuring optimal physical design verification. The role requires expertise with industry-standard tools like Innovus, Tempus, and PrimeTime, along with a strong understanding of signal and power integrity for high-speed designs.
Broadcom offers an inclusive work environment and comprehensive benefits package including medical, dental, and vision coverage, 401(k) matching, stock purchase programs, and various leave benefits. This position presents an opportunity to work on cutting-edge semiconductor technology while contributing to a global technology leader's success.
The role demands both technical expertise and strong interpersonal skills, as you'll be collaborating with cross-functional teams and influencing project outcomes. You'll be at the forefront of semiconductor design, working with the latest technology nodes and contributing to innovative solutions in the semiconductor industry.
Responsibilities For ASIC Digital Physical Design Engineer
- Debug LVS/DRC issues at the chip and block level
- Manage design tape-out to foundries
- Oversee IC Product development supply chain
- Optimize power consumption and area for digital blocks
- Facilitate technical development and consensus building
- Manage time and tasks effectively
Requirements For ASIC Digital Physical Design Engineer
- MS in Electrical Engineering or Computer Engineering with 10+ years of experience in Physical design or PhD with 7+ years of experience
- Deep knowledge about industry standards in Physical Design, Physical aware synthesis, Floor-planning, CTS and place and route
- Experience in developing and implementing Power-grid and high speed clock constraints and specification
- Good understanding of physical design verification methodology
- Experience with CDC, static timing analysis methodologies
- Understanding and experience of mixed signal IPs and environments
- Familiarity with Innovus, Tempus, PrimeTime, Virtuoso, Caliber & Redhawk tools
- Understanding of backend Cadence tools
- Experience with TSMC 7nm-2nm technology
- Deep understanding of Signal Integrity and Power Integrity for High Speed designs
Benefits For ASIC Digital Physical Design Engineer
- Medical, dental and vision plans
- 401(K) with company matching
- Employee Stock Purchase Program (ESPP)
- Employee Assistance Program (EAP)
- Paid holidays
- Paid sick leave
- Vacation time
- Paid Family Leave
- Annual discretionary bonus
- Equity compensation
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