Broadcom, a global leader in semiconductor and infrastructure software solutions, is seeking a Senior ASIC Physical Design Engineer for their Singapore office. This role focuses on advanced semiconductor design using cutting-edge process technologies (7nm to 2nm). The position requires expertise in EDA tools from industry leaders like Synopsys, Cadence, and Siemens, handling complex digital blocks and full Netlist/Gates to GDS flow implementation.
The ideal candidate will have at least 5 years of experience in ASIC physical design, with strong educational background in Electrical, Electronics, or Computer Engineering. You'll be working on sophisticated integrated circuits with 100-400 million gates, requiring deep technical knowledge in various aspects of chip design including RTL synthesis, placement, clock tree synthesis, and verification.
This is an excellent opportunity for experienced engineers looking to work with advanced semiconductor technologies at a company that's at the forefront of technological innovation. You'll be part of a team that develops crucial components for modern computing infrastructure, working with state-of-the-art tools and processes.
The role offers the chance to work on challenging projects that push the boundaries of semiconductor technology, requiring both technical expertise and the ability to manage multiple complex assignments simultaneously. At Broadcom, you'll be contributing to products that power the future of technology while working in an inclusive environment that values diversity and innovation.