BackEnd Physical Design Engineer

Broadcom, a global leader in semiconductor and infrastructure software solutions, is seeking a Senior Backend Physical Design Engineer for their Bangalore office. This role focuses on implementing and leading Broadcom's proven design methodology for achieving right-first-time silicon.

The position requires deep expertise in SoC design, particularly in top-down/bottom-up physical design integration using 7nm and lower technologies. You'll be responsible for critical tasks including floorplanning, partitioning, placement, clock tree synthesis, routing, and physical verification.

As a senior engineer, you'll drive sub-block/partition decisions, generate and review interface budgets, and work with various EDA tools from Cadence/Synopsys/Mentor. The role demands strong proficiency in P&R flows and the ability to quickly adapt to internal workflows.

The ideal candidate should have 8+ years of experience with a BSEE/BSCS (or 6+ years with MSEE/MSCS), demonstrating expertise in backend digital design flow, timing constraints, and physical constraints. Proficiency in TCL, Perl/Python, and various backend EDA tools is essential.

This is an excellent opportunity to work with cutting-edge technology in semiconductor design, collaborating with cross-functional teams across different time zones. The position offers the chance to contribute to tangible improvements in turnaround time while maintaining superior quality standards.