Design Engineer Architect/Lead
Description For Design Engineer Architect/Lead
Broadcom is seeking a Principal Design Engineer Architect/Lead to join their team in San Jose. This role combines technical leadership with hands-on engineering expertise in ASIC design and development. The position offers a competitive salary range of $141,000 - $225,000 plus benefits and equity.
The ideal candidate will lead a team of engineers, working directly with customers on physical synthesis and RTL optimization. You'll be responsible for defining timing constraints and collaborating with physical design teams to ensure successful ASIC manufacturing, with a focus on power efficiency, area optimization, and performance.
This role requires deep expertise in VLSI and ASIC physical design, with at least 12 years of experience in ASIC architecture and development. You should be proficient with industry-standard tools like Synopsys and Cadence suites, and have strong programming skills in TCL, Python/Ruby, and BASH.
Broadcom offers comprehensive benefits including medical, dental, and vision coverage, 401(k) matching, ESPP, paid time off, and equity compensation. The company values diversity and maintains an inclusive work environment, considering qualified applicants regardless of background.
The position involves working with cross-functional teams across different time zones, requiring excellent communication and organizational skills. You'll have the opportunity to work on cutting-edge semiconductor technology while leading and mentoring a team of talented engineers.
Responsibilities For Design Engineer Architect/Lead
- Lead a team of engineers to interact with customers on physical synthesis
- Influence RTL content and coding styles
- Define and influence sub-system content for memory interfaces, NOC, processor sub-systems
- Define timing constraints with customers
- Interface with physical design team for overall closure
- Manage manufacturing of ASIC with focus on low power, optimized area, performance and yield
- Supervise activities of team members
- Work independently to determine methods and procedures
- Coordinate among groups across geographical time-zones
Requirements For Design Engineer Architect/Lead
- BS/MS degree in Electrical Engineering or Computer Engineering
- 12+ years of experience with deep understanding of ASIC architecture, design, development and verification
- Experience with synthesis and physical synthesis tools (Synopsys and Cadence tool suites)
- Deep understanding of PLLs and clock networks
- Experience with static timing analysis tools (Synopsys PrimeTime/Cadence Tempus)
- Strong understanding of VLSI and ASIC physical design
- TCL programming experience required
- Experience with Python/Ruby and BASH
- Strong ability to debug problems and create solutions
- Excellent communication and organizational skills
Benefits For Design Engineer Architect/Lead
- Medical, dental and vision plans
- 401(K) participation including company matching
- Employee Stock Purchase Program (ESPP)
- Employee Assistance Program (EAP)
- Company paid holidays
- Paid sick leave and vacation time
- Paid Family Leave
- Equity
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