Design Implementation Engineer

Broadcom is seeking a Design Implementation Engineer to work on design implementation activities related to place and route and/or timing closure. The role involves floor-planning, partitioning, placement, clock tree synthesis, route, timing analysis, timing closure, and physical verification (LVS/DRC). The candidate should be able to drive tools and methodologies to achieve desired PPA metrics.

Key responsibilities include:

• Implementing Broadcom's proven design methodology and milestone flow
• Performing equivalence checks, STA, timing closure, and power optimization
• Implementing timing and functional ECOs
• Working on both block and SoC level design implementation activities
• Developing and validating constraints, performing timing analysis and closure
• Conducting formal verification and ECO implementation

The ideal candidate should have:

• Expertise in place and route and/or timing (constraints, STA)
• Experience with tools such as Primetime, ICC2, Innovus, Caliber, LEC, PrimeTime
• Full chip tapeout experience based on 7nm and lower technologies
• Strong problem-solving skills and ability to work independently
• Experience working in a global team and dynamic environment
• Excellent communication skills
• Hands-on experience with timing analysis and place and route tools for ASIC/SoC Design
• Worked on tape out of at least 1-2 ASICs in 7nm or lower technologies

Education and Experience:

• BS in Electrical Engineering/Computer Engineering or related field with 8+ years of experience, or
• MS in Electrical Engineering/Computer Engineering or related field with 6+ years of experience

Broadcom offers a competitive compensation package, including a base salary range of $107,000 - $190,000, discretionary annual bonus, equity, and comprehensive benefits. Join a global leader in semiconductor and infrastructure software solutions and contribute to cutting-edge technology development.