DFT Engineer

Broadcom is seeking a DFT Engineer to join their team in Shanghai, China. This role involves participating in chip level DFT architecture definition and implementing basic DFT schemes. The ideal candidate will be responsible for verifying DFT logics, conducting test modes static timing analysis, and participating in ATE bring-up and debugging DFT patterns.

Key Responsibilities:

1. Participate in chip level DFT architecture definition.
2. Implement basic DFT schemes, including scan, boundary scan, Mem BIST and Logic BIST.
3. Verify all DFT logics and test patterns with simulation.
4. Conduct test modes static timing analysis.
5. Participate in ATE bring-up and debug the DFT patterns on ATE.

Broadcom is proud to be an equal opportunity employer, considering qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, gender identity, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by law.

Join a global leader in semiconductor and infrastructure software solutions, and be part of a team that's shaping the future of technology. Broadcom offers a dynamic work environment and the opportunity to work on cutting-edge projects in the field of Design for Testability (DFT) engineering.

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