IC Design and Verification Engineer
Description For IC Design and Verification Engineer
Broadcom, a global leader in semiconductor and infrastructure software solutions, is seeking an experienced IC Design and Verification Engineer to join their team in Denver, CO. This senior-level position offers a competitive salary range of $127,000 - $203,000 plus comprehensive benefits.
The role demands a highly skilled professional with 12+ years of experience in IC design and verification. You'll be responsible for designing complex functions, developing verification environments using System Verilog and UVM, and creating verification components. The position requires expertise in RTL verification methodologies, synthesis, DFT, CDC, and ATPG, making it ideal for someone with a strong background in ASIC design verification flows.
As part of Broadcom's engineering team, you'll work on cutting-edge semiconductor technology, implementing coverage and assertions using System Verilog, developing test cases, and analyzing simulation failures. The role offers an opportunity to work with advanced design and verification tasks while collaborating with cross-functional teams.
The company offers an attractive compensation package including medical, dental, and vision insurance, 401(k) with company matching, equity through ESPP, and various other benefits. This is an excellent opportunity for a seasoned professional looking to advance their career in IC design and verification at a leading technology company.
The ideal candidate will possess strong debugging capabilities, excellent communication skills, and the ability to work independently while contributing to team success. If you're passionate about semiconductor design and verification, and have a proven track record in ASIC development, this role offers the perfect blend of technical challenges and career growth opportunities.
Responsibilities For IC Design and Verification Engineer
- Design of complex functions
- Verification environment development using System Verilog and UVM
- Designing verification components such as UVM agents and behavioral models
- Implementing coverage and assertions using System Verilog
- Developing random & directed test cases against the specification
- Analyzing and debugging simulation failures
- Analyzing coverage results
Requirements For IC Design and Verification Engineer
- Bachelor's degree and 12+ years of related experience
- Fluent knowledge of RTL verification methodologies including System Verilog
- Strong experience in Synthesis, DFT, CDC and ATPG
- Strong experience in ASIC design verification flows and DV methodologies
- Strong working knowledge of object oriented verification languages (OVM, UVM)
- Proficiency in C/C++ and scripting skills
- Strong verbal and written communication skills
- Strong and independent design debugging capability
- Familiarity with overall chip design methodologies and tools
Benefits For IC Design and Verification Engineer
- Medical insurance
- Dental insurance
- Vision insurance
- 401(k) with company matching
- Employee Stock Purchase Program (ESPP)
- Employee Assistance Program (EAP)
- Paid holidays
- Paid sick leave
- Vacation time
- Paid Family Leave
- Annual discretionary bonus
- Equity compensation
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