IP Integration Lead Engineer

A global technology leader that designs, develops and supplies semiconductor and infrastructure software solutions.
$107,000 - $171,000
Embedded
Staff Software Engineer
In-Person
8+ years of experience
Enterprise SaaS · AI

Description For IP Integration Lead Engineer

Broadcom's ASIC Product Division (APD) is seeking an IP Integration Lead Engineer to join their team in developing cutting-edge die-to-die PHY IP. This role is crucial in enabling customers to develop products with sustainable competitive advantages across various industries, from cloud computing AI engines to advanced wireless solutions.

The position involves working with a cross-functional design team, focusing on the physical composition of PHY IP and developing methodologies for integration into complex 2.5D and 3DIC ASICs. The successful candidate will be responsible for coordinating with multiple teams, including analog design, digital design, physical composition, DFT, timing, and customers.

Key responsibilities include optimizing signal IO patterns, managing power delivery for high IO density PHYs, analyzing power integrity, and developing comprehensive integration documentation. The role requires a deep understanding of ASIC design flow and experience with industry-standard tools like Cadence Innovus.

The position offers a competitive compensation package ranging from $107,000 to $171,000 annually, plus discretionary bonuses and equity opportunities. Broadcom provides comprehensive benefits including medical, dental, vision, 401(k) with company matching, ESPP, and various leave benefits.

This is an excellent opportunity for experienced engineers looking to work on bleeding-edge technology platforms and intellectual property. The role demands both independent work capability and strong team collaboration skills, making it ideal for those who thrive in a dynamic, technical environment focused on innovation and customer success.

Last updated 15 days ago

Responsibilities For IP Integration Lead Engineer

  • Develop detailed understanding of Broadcom's die-to-die PHYs
  • Coordinate with cross functional teams to build PHYs
  • Work with physical composition teams to optimize signal IO patterns and escapes
  • Analyze power integrity in various use cases and workloads
  • Develop PHY integration documentation
  • Develop integration checklist tasks
  • Support customer and ASIC PHY integration questions

Requirements For IP Integration Lead Engineer

Python
Ruby
  • Bachelor's Degree in Electrical and Electronic Engineering or equivalent and 8+ years of experience or Masters degree and 6+ years
  • Understanding of design trade offs for power, area, and speed in ASIC designs
  • Understanding of complex issues related to timing closure, power integrity and signal integrity
  • Firm understanding of ASIC design flow including FET design, RTL, synthesis, timing, floorplanning
  • Experience with Cadence Innovus or equivalent toolset
  • Strong verbal, written communication, and presentation skills
  • Well organized, methodical, and detail oriented

Benefits For IP Integration Lead Engineer

Medical Insurance
Dental Insurance
Vision Insurance
401k
Mental Health Assistance
Parental Leave
  • Medical, dental and vision plans
  • 401(K) participation including company matching
  • Employee Stock Purchase Program (ESPP)
  • Employee Assistance Program (EAP)
  • Paid holidays, sick leave and vacation time
  • Paid Family Leave
  • Annual discretionary bonus
  • Equity compensation

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