Broadcom's ASIC Product Division (APD) is seeking an IP Integration Lead Engineer to join their team in developing cutting-edge die-to-die PHY IP. This role is crucial in enabling customers to develop products with sustainable competitive advantages across various industries, from cloud computing AI engines to advanced wireless solutions.
The position involves working with a cross-functional design team, focusing on the physical composition of PHY IP and developing methodologies for integration into complex 2.5D and 3DIC ASICs. The successful candidate will be responsible for coordinating with multiple teams, including analog design, digital design, physical composition, DFT, timing, and customers.
Key responsibilities include optimizing signal IO patterns, managing power delivery for high IO density PHYs, analyzing power integrity, and developing comprehensive integration documentation. The role requires a deep understanding of ASIC design flow and experience with industry-standard tools like Cadence Innovus.
The position offers a competitive compensation package ranging from $107,000 to $171,000 annually, plus discretionary bonuses and equity opportunities. Broadcom provides comprehensive benefits including medical, dental, vision, 401(k) with company matching, ESPP, and various leave benefits.
This is an excellent opportunity for experienced engineers looking to work on bleeding-edge technology platforms and intellectual property. The role demands both independent work capability and strong team collaboration skills, making it ideal for those who thrive in a dynamic, technical environment focused on innovation and customer success.