Memory System Designer and Place and Route Engineer
Description For Memory System Designer and Place and Route Engineer
Broadcom, a global leader in semiconductor and infrastructure software solutions, is seeking a Memory System Designer and Place and Route Engineer for their Central Engineering Group. This senior-level position focuses on developing large memory blocks and subsystems, requiring extensive experience in RTL design, physical design, and memory architecture.
The role combines hardware design expertise with software development skills, requiring proficiency in Verilog RTL coding, Python programming, and various EDA tools. The successful candidate will be responsible for architecting memory subsystems, implementing RTL designs, and ensuring design closure through various verification processes.
This position offers a competitive compensation package ranging from $107,000 to $171,000 annually, plus additional benefits including medical, dental, and vision insurance, 401(k) matching, and equity opportunities. The role is based in Mendota Heights, offering the opportunity to work with cutting-edge technology in memory system design.
The ideal candidate will have at least 8 years of relevant experience, strong technical skills in hardware design and verification, and excellent communication abilities. This role presents an exciting opportunity to work on challenging projects at a leading technology company while contributing to innovative memory system solutions.
Responsibilities For Memory System Designer and Place and Route Engineer
- Architect and design memory subsystems
- Implement RTL of subsystem designs
- Place and route (physical design)
- Design closure: timing, DRC, LVS, EM/IR, etc.
- Gate netlist synthesis
Requirements For Memory System Designer and Place and Route Engineer
- Strong design skills
- Ability to write and debug Verilog RTL code
- Place and route expertise
- Proficient in running STA, DRC, EM/IR tools, and attaining design closure
- Ability to code in Python
- Good understanding of synthesis tools and running synthesis
- Capable of running and debugging logical equivalency checkers
- Familiar with memory behavior
- Proficient in writing automation scripts, and tools savvy
- Good communication, interpersonal, and leadership skills
- Motivated, self-driven, and good at multitasking
- Bachelor in Electrical Engineering
Benefits For Memory System Designer and Place and Route Engineer
- Medical insurance
- Dental insurance
- Vision insurance
- 401(k) with company matching
- Employee Stock Purchase Program (ESPP)
- Employee Assistance Program (EAP)
- Paid holidays
- Paid sick leave
- Vacation time
- Paid Family Leave
- Annual discretionary bonus
- Equity awards
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