Package Design Engineer

Broadcom is a global technology leader that designs, develops and supplies a broad range of semiconductor and infrastructure software solutions.
Fort Collins, CO, USASan Jose, CA, USA
$107,000 - $190,000
Embedded
Senior Software Engineer
Hybrid
8+ years of experience
AI · Enterprise SaaS

Description For Package Design Engineer

Broadcom is seeking an experienced package design engineer for complex flip-chip-BGA packages for industry-leading ASICs with high-speed SerDes and very-high-power delivery needs. You will be part of a worldwide R&D team developing high-performance package designs for ASICs for artificial intelligence (AI), networking, high-performance computing (HPC), and 5G base stations. These designs include SerDes at 224G and higher, 5G RF/Microwave ADC/DAC, HBM, DDR5 and more. You'll have the opportunity to collaborate with the team to create the package structures needed to enable new design, and contribute to efficiency improvements for our design team.

Responsibilities:

  • Overall design responsibility for ASIC package designs, including aspects of signal integrity, power integrity, manufacturability, reliability, and thermal, in partnership with our experienced team of package engineering experts.
  • Package Design of critical structures for SerDes, ADC/DAC, DDR, etc.
  • Schedule, prioritize, & track your work across 2+ projects simultaneously
  • General flip-chip BGA package design & engineering
  • Project management and customer interface for your design projects
  • Contribute to efficiency improvements for the design team

Requirements:

  • BSEE or similar field and 8+ years' experience in flip-chip-BGA package design, including high-speed SerDes OR MSEE or similar field and 6+ years' experience in flip-chip-BGA package design, including high-speed SerDes
  • Knowledge of package-level signal integrity and power integrity, to apply to package designs
  • Cadence APD (allegro package designer) experience is preferred. Equivalent tool is OK.
  • Cooperate with our world-wide team (multiple time zones), including co-design with internal team members and external (Vendor) designers
  • Self-management and organization skills
  • 1 or more years experience with Cadence SKILL for Allegro, or similar design-automation coding experience and interest (3 or more years is preferred)

Broadcom offers a competitive and comprehensive benefits package including medical, dental and vision plans, 401(K) participation with company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time.

Last updated 2 months ago

Responsibilities For Package Design Engineer

  • Overall design responsibility for ASIC package designs
  • Package Design of critical structures for SerDes, ADC/DAC, DDR, etc.
  • Schedule, prioritize, & track work across 2+ projects simultaneously
  • General flip-chip BGA package design & engineering
  • Project management and customer interface for design projects
  • Contribute to efficiency improvements for the design team

Requirements For Package Design Engineer

  • BSEE or similar field and 8+ years' experience in flip-chip-BGA package design, including high-speed SerDes OR MSEE or similar field and 6+ years' experience in flip-chip-BGA package design, including high-speed SerDes
  • Knowledge of package-level signal integrity and power integrity
  • Cadence APD (allegro package designer) experience preferred
  • 1+ years experience with Cadence SKILL for Allegro or similar design-automation coding experience
  • Self-management and organization skills

Benefits For Package Design Engineer

401k
Dental Insurance
Medical Insurance
Vision Insurance
  • Medical insurance
  • Dental insurance
  • Vision insurance
  • 401(k) with company matching
  • Employee Stock Purchase Program (ESPP)
  • Employee Assistance Program (EAP)
  • Paid holidays
  • Paid sick leave
  • Vacation time

Interested in this job?

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