Physical Design Engineer

Broadcom Limited offers an excellent opportunity to contribute to a team environment and to grow personal career path. You will be working with internal and external customers to develop state of the art IC solutions utilizing LSI's leading edge CMOS cell-based ASIC technologies. You will have responsibility for ASIC designs through all of the key development and implementation phases including RTL analysis, synthesis, design optimization, timing verification, simulation, test insertion, physical design, vector generation, and post-prototype test support. Candidates will have opportunity to work on the latest 16FF/7nm & 5nm designs.

Detail design tasks include:

• Full Chip Synthesis and STA: An ideal candidate should have some background on full chip synthesis flow (DC, DCT, DCG) for 16nm/7nm design tape out. This candidate request has more top design integration and synthesis project experience.
• It would be better if the candidate have the experience running full chip STA and constraint clean up flow.
• Physical Design Implementation: An ideal candidate having some background in either the Physical Design which includes floor planning, placement, design closure, and DRC & LVS skills.

Overall, candidates are expected to develop most of the above skills. Candidates who have the desire to seek in-depth and broad technical challenges should apply.

Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, gender identity, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.