Senior Engineer- PNR/STA

Broadcom Central Engineering Group is seeking a Senior Design Engineer specializing in Place and Route (PNR) and Static Timing Analysis (STA). This role is crucial for developing complex Digital IP subsystems and Semi-custom macros across cutting-edge process technologies. The position involves working with advanced technology nodes and requires expertise in netlist to GDS2 automation, floor planning, and timing closure.

The ideal candidate will be responsible for developing automation flows for complex digital/mixed signal blocks, defining constraints for timing closure, and collaborating with cross-functional teams. They will work on architectural feasibilities with multiple power islands and develop automated flows for timing closure.

Key technical requirements include hands-on experience with tools like ICC2, Fusion compiler, Innovus, and Prime time. The role demands strong expertise in TCL/PERL scripting for automation and deep knowledge of Signal and Power Floor planning. Candidates should have experience handling complex netlists with multiple frequency domains and be proficient in analyzing timing reports.

Broadcom offers an opportunity to work with cutting-edge semiconductor technology and be part of a global team. The company values diversity and maintains an inclusive work environment, considering qualified applicants regardless of background. This role provides exposure to advanced process technologies and complex digital design challenges, making it an excellent opportunity for experienced engineers looking to work with state-of-the-art semiconductor design tools and methodologies.