Serdes / High Speed IO DFT Engineer
Description For Serdes / High Speed IO DFT Engineer
Broadcom's ASIC Product Division is seeking a SerDes DFT & Test Engineer at their Fort Collins Development Center. This role focuses on ensuring the robustness and reliability of SerDes IPs through comprehensive Design for Test verification and validation strategies. The position involves working with cutting-edge SerDes IPs supporting various protocols like PCIe and Ethernet at industry-leading data rates.
The role combines hardware engineering expertise with software automation, requiring deep knowledge of both analog and digital domains. You'll be responsible for implementing DFT methodologies, collaborating with cross-functional teams, and ensuring product quality through thorough testing and validation processes. The position offers exposure to advanced semiconductor technologies and the opportunity to work with some of the highest data rates in the industry.
Broadcom offers a competitive compensation package including a base salary range of $146,000 - $234,000, plus discretionary annual bonus and equity opportunities. The comprehensive benefits package includes medical, dental, and vision coverage, 401(k) with company matching, ESPP, and various leave benefits.
The ideal candidate will bring 15+ years of relevant industry experience (or 13+ with a Master's degree), strong DFT background, and expertise in both analog and digital domains. This role presents an excellent opportunity for experienced professionals looking to work at the forefront of semiconductor technology while contributing to critical infrastructure components used across the industry.
Responsibilities For Serdes / High Speed IO DFT Engineer
- Implement and verify DFT methodologies for SerDes IP
- Collaborate with design and architecture teams to identify testability requirements
- Utilize advanced simulation tools for DFT verification
- Analyze DFT-related data for design improvements
- Document verification processes and results
- Generate, verify & debug test vectors
- Validate & debug test vectors on ATE during silicon bring up
- Assist with silicon failure analysis and yield improvement
- Interface with customers and cross-functional teams
- Automate DFT & Test Vector Generation flows
Requirements For Serdes / High Speed IO DFT Engineer
- Good understanding of Mixed Signal IPs, Digital and Analog logic
- Strong DFT background (Analog DFT, MBIST, IEEE1687)
- Experience in DFT verification with Serdes IP architecture knowledge
- Proficiency in simulation tools and scripting languages (Perl, Python, TCL, Ruby)
- Strong communication and teamwork abilities
- Solid knowledge in analog and digital circuit design
- Excellent problem solving and debug skills
- Bachelor's in Electrical/Electronic/Computer Engineering with 15+ years experience or Master's with 13+ years experience
- Experience with ATE (preferred)
- Knowledge of AHB/APB/AXI buses & Protocols (preferred)
Benefits For Serdes / High Speed IO DFT Engineer
- Employee Stock Purchase Program (ESPP)
- Employee Assistance Program (EAP)
- Company paid holidays
- Paid sick leave
- Vacation time
- Company matching 401k
- Comprehensive medical, dental and vision plans
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