Staff SRAM Design Engineer
Description For Staff SRAM Design Engineer
Broadcom, a global leader in semiconductor and infrastructure software solutions, is seeking a Staff SRAM Design Engineer to join their team in Bangalore. This is a critical role focused on advanced memory design and development, specifically working with cutting-edge technologies including 7FF/5FF/3FF/2nm.
The position offers an opportunity to work on sophisticated SRAM and Register file compiler development, requiring expertise in circuit design and simulation of crucial components. You'll be responsible for leading the design and optimization of high-performance memory systems, conducting detailed statistical analysis, and ensuring designs meet yield and performance targets.
The ideal candidate will bring deep expertise in CMOS circuit design and hands-on experience with industry-standard tools like Cadence/Mentor. You'll work within a collaborative environment, coordinating with cross-functional teams including design, modeling, layout, and verification specialists.
This role presents an excellent opportunity for a seasoned professional to work with cutting-edge semiconductor technology at a company that's at the forefront of global technology innovation. You'll be part of a team that's pushing the boundaries of what's possible in memory design and contributing to next-generation semiconductor solutions.
Broadcom offers a professional work environment and is an equal opportunity employer, valuing diversity and inclusion in their workforce. The position is based in Bangalore's Electronic City, offering the chance to work with some of the industry's best minds in semiconductor design.
Responsibilities For Staff SRAM Design Engineer
- Lead design and development of Single/Multiport SRAM, Register file compilers in 7FF/5FF/3FF/2nm Technologies
- Circuit design/simulation of key components including bitcell, WL decoder, Sense Amplifier, Column decoder and control logic
- Develop critical path and characterization flow for detailed margin simulations
- Perform statistical analysis of Bit-Cell, Sense Amplifier and Self Time Blocks
- Design tuning/optimizations, margin analysis and sign-off for complete compiler
- Conduct logic simulations and timing analysis of key paths in high speed memory design
- Coordinate with various teams including design, modeling, layout and verification teams
Requirements For Staff SRAM Design Engineer
- Expertise in high speed/low power CMOS circuit design, clocking scheme, Static and dynamic logic circuits
- Experience in designing and driving memory compilers specifications to final release
- Hands-on experience with Cadence/Mentor schematic/layout editor tools
- Experience with Circuit simulation, MC analysis and waveform viewer tools (HSPICE, HSIM, XA, FinSim, XARA, nWave, WV)
- Skill/Perl/Python Scripting experience is a plus
- Understanding of layout design issues and process issues/limitation in FINFET
Benefits For Staff SRAM Design Engineer
- Equal Opportunity Employer
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