Standard Cell Library Design Engineer

Global technology leader designing and developing semiconductor and infrastructure software solutions
Embedded
Mid-Level Software Engineer
In-Person
5,000+ Employees
2+ years of experience
Enterprise SaaS

Description For Standard Cell Library Design Engineer

Broadcom's Central Engineering Group is seeking a Standard Cell Library Design Engineer to join their Foundation IP team that powers Broadcom's leading silicon product families. This role focuses on the design, development, and delivery of standard cell library foundation IP.

The position requires strong expertise in digital and mixed-signal circuit design, with a deep understanding of modern semiconductor technologies like FinFet and RibbonFet/GAA process nodes. You'll be working with industry-standard EDA tools and models, including Virtuoso and Cadence Skill programming.

As a Standard Cell Library Design Engineer, you'll be responsible for designing cells at the transistor level, performing simulations, generating library models, and ensuring quality through various checks and regressions. The role requires collaboration with design teams to support their requirements and maintain high standards of deliverables.

The ideal candidate should have at least 2 years of experience, with a Bachelor's degree in Electrical or Computer Engineering (Masters/PhD preferred). Strong programming skills in Unix, Perl, TCL, or Python are essential, along with excellent communication abilities and teamwork skills.

This is an excellent opportunity to work with cutting-edge semiconductor technology at a global leader in the industry. You'll be part of a team that creates fundamental building blocks for Broadcom's innovative product families, making a significant impact on the company's technological advancement.

Last updated 6 days ago

Responsibilities For Standard Cell Library Design Engineer

  • Design standard cells at the transistor level
  • Simulate and analyze circuit designs
  • Generate and verify library EDA models
  • Run regression and other quality checks on library deliverables
  • Interface with design teams to support their requirements

Requirements For Standard Cell Library Design Engineer

Python
  • Digital or mixed-signal circuit design knowledge
  • Understanding of cell layout or physical design
  • Understanding of FinFet, RibbonFet/GAA process nodes
  • Understanding of verilog, lef, .lib and other industry standard EDA models
  • Familiarity with EDA tools used in STA and PnR
  • Experience with Virtuoso, Cadence Skill programming
  • Scripting using Unix, Perl, TCL or Python
  • Bachelor's in Electrical or Computer Engineering
  • Excellent written and verbal communication skills
  • Ability to collaborate and work within and across teams
  • Must be Singapore Citizen/PR only

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