ASIC Engineering Technical Leader

Cisco is a leading networking company that delivers silicon, optics, and hardware platforms for core Switching, Routing, and Wireless products.
$165,700 - $232,900
Backend
Staff Software Engineer
In-Person
5,000+ Employees
10+ years of experience
Enterprise SaaS · Networking

Description For ASIC Engineering Technical Leader

The Common Hardware Group (CHG) at Cisco delivers silicon, optics, and hardware platforms for core Switching, Routing, and Wireless products. We design networking hardware for Enterprises, Service Providers, Public Sector, and Non-Profit Organizations worldwide. Cisco Silicon One is the only unifying silicon architecture in the market enabling customers to deploy best-of-breed silicon across various network environments.

As an ASIC Engineering Technical Leader, you'll join a team shaping revolutionary solutions for data centers by designing complex chips. You'll work in a unique startup culture within the leading networking company globally. The role involves:

  • Architecting block, cluster, and top-level DV environment infrastructure
  • Creating and maintaining DV environments
  • Ensuring complete verification coverage
  • Working closely with designers and software teams
  • Supporting tests with emulation
  • ASIC bring-up responsibilities

Qualifications:

  • 10+ years of ASIC design verification experience
  • Bachelor's or Master's degree or equivalent experience
  • Experience with UVM/System Verilog, building test benches, and scripting (Perl/Python)
  • Domain experience in protocols like PCIe, Ethernet, RDMA, TCP

Preferred skills:

  • Experience with Forwarding logic/Parsers/P4
  • Experience with emulation tools (Veloce/Palladium/Zebu/HAPS)
  • Formal verification experience

Join Cisco to be part of a diverse and inclusive team that embraces digital transformation and innovation. We offer competitive compensation, comprehensive benefits, and a culture that values work-life balance and giving back to the community.

Last updated a month ago

Responsibilities For ASIC Engineering Technical Leader

  • Architect block, cluster and top level DV environment infrastructure
  • Create and maintain DV environments
  • Ensure complete verification coverage
  • Work closely with designers and software teams
  • Support tests with emulation
  • ASIC bring-up responsibilities

Requirements For ASIC Engineering Technical Leader

Java
Python
  • 10+ years ASIC design verification experience
  • Bachelor's or Master's degree or equivalent experience
  • Experience with UVM/System Verilog
  • Experience building test benches from scratch
  • Experience with Perl and/or Python scripting
  • Domain experience in protocols like PCIe, Ethernet, RDMA, TCP

Benefits For ASIC Engineering Technical Leader

Medical Insurance
Dental Insurance
Vision Insurance
401k
  • Medical Insurance
  • Dental Insurance
  • Vision Insurance
  • 401k
  • Life Insurance
  • Paid Time Off
  • Paid Holidays
  • Employee Stock Purchase Program

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