ASIC Physical Design Engineer
Description For ASIC Physical Design Engineer
Cisco is seeking ASIC Physical Design Engineers to join their Silicon One Team, working on cutting-edge silicon technologies and processes. As part of the team developing Cisco Silicon One™, you'll contribute to revolutionizing the industry by building a new internet for the 5G era. The role involves working with unified, programmable silicon architecture that serves as the foundation for all of Cisco's future routing products.
The position offers an opportunity to work on devices designed to be universally adaptable across service providers and web-scale markets. You'll be involved in developing solutions that deliver high speed without compromising on programmability, buffering, power efficiency, scale, or feature flexibility. This groundbreaking technology will serve customers and end users for decades to come.
Working at Cisco means being part of a team that values innovation, creativity, and inclusive culture. The company has a 36-year strong legacy but continues to evolve, encompassing software, security, and intuitive networking solutions. Cisco emphasizes work-life balance, professional growth, and a collaborative environment where diversity of thought is celebrated.
The role combines technical expertise with team collaboration, requiring strong communication skills and self-motivation. You'll be working with industry-standard tools and technologies, participating in all aspects of ASIC physical design from RTL to GDSII. The position offers comprehensive benefits, professional development opportunities, and the chance to be part of transformative technology development.
Responsibilities For ASIC Physical Design Engineer
- Engage in full chip physical implementation, covering the process from RTL to GDSII
- Collaborate with Front-End teams to understand design architecture for effective implementation
- Perform gate-level netlist synthesis and physical implementation tasks
- Optimize design for power, performance, and area
- Conduct formal verification to ensure design integrity
- Perform Static Timing Analysis (STA)
- Complete physical verification and achieve signoff closure
- Analyze and resolve Electromigration (EM) and IR-drop (IR) issues
Requirements For ASIC Physical Design Engineer
- B.Sc./M.Sc in Electrical Engineering, Computer Science, or any other relevant field
- Proven experience in ASIC physical design and verification
- Knowledge and experience in block-level synthesis, place, and route, timing closure
- Knowledge of industry-standard PnR and signoff tools and their capabilities
- Deep understanding of all aspects of Physical construction and Integration
- Knowledge in Physical Design Verification methodology LVS/DRC
- Understanding of Static Timing Analysis, timing closure, and design constraints
- Experience in scripting languages like Tcl, Python, Perl
Benefits For ASIC Physical Design Engineer
- Medical insurance
- Dental insurance
- Vision insurance
- 401(k) plan with company matching
- Short and long-term disability coverage
- Basic life insurance
- Paid holidays
- Vacation Time Off
- Sick Time Off
- Volunteer time off
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