Physical Design Engineer

Cisco connects everything: people, processes, data, and things. We innovate everywhere, taking bold risks to shape the technologies that give us smart cities, connected cars, and handheld hospitals.
$165,700 - $232,900
Backend
Staff Software Engineer
In-Person
5,000+ Employees
7+ years of experience
Enterprise SaaS

Description For Physical Design Engineer

The Common Hardware Group (CHG) at Cisco delivers silicon, optics, and hardware platforms for core Switching, Routing, and Wireless products. We design networking hardware for various organizations worldwide. Cisco Silicon One is a unifying silicon architecture enabling customers to deploy best-of-breed silicon across networks and data centers.

As a Physical Design Engineer in the Silicon One development organization, you'll focus on Design-for-Test and work with Front-end RTL teams and backend physical design teams. Your responsibilities include:

  • Performing full chip DRC/LVS/ERC/ANT checks, reviewing and debugging issues
  • Working with block and top-level implementation teams
  • Deploying and improving physical verification flows and methodologies
  • Developing custom checks for verification robustness
  • Supporting block and TOP implementation teams to solve local PV issues

Qualifications:

  • BS/MS in Electrical Engineering or Computer Science
  • 7+ years of hands-on experience in ASIC implementation and Physical verification
  • Experience with deep submicron CMOS technologies
  • Proficiency in scripting languages (Python, Tcl, Skill)
  • Experience with 7nm nodes and below (preferred)
  • Background in industry-standard physical verification EDA tools

Join Cisco to shape groundbreaking solutions and design some of the most complex ASICs in the industry. We offer a diverse and innovative work environment with opportunities for growth and impact.

Last updated 3 months ago

Responsibilities For Physical Design Engineer

  • Perform full chip DRC/LVS/ERC/ANT checks, review and debug issues, provide solutions
  • Work with block and top-level implementation teams
  • Deploy and improve physical verification flows and methodologies
  • Develop custom checks for verification robustness
  • Support block and TOP implementation teams to solve local PV issues

Requirements For Physical Design Engineer

Python
  • BS/MS in Electrical Engineering or Computer Science
  • 7+ years of hands-on experience in ASIC implementation and Physical verification
  • Experience with deep submicron CMOS technologies
  • Experience in physical verification (DRC, LVS, ERC, ANT), debug and solution
  • Proficiency in scripting languages (Python, Tcl, Skill)
  • Experience on 7nm nodes and below (preferred)
  • Background in industry-standard physical verification EDA tools

Benefits For Physical Design Engineer

401k
Dental Insurance
Medical Insurance
Vision Insurance
  • Medical insurance
  • Dental insurance
  • Vision insurance
  • 401(k) plan with Cisco matching contribution
  • Short and long-term disability coverage
  • Basic life insurance
  • Wellbeing offerings
  • Paid holidays (up to twelve per calendar year)
  • Paid Time Off (PTO) accrual up to 20 days per year
  • Paid time for volunteering
  • Employee Stock Purchase Program

Interested in this job?

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