Senior Digital Backend (Place & Route) Layout Engineer

E-Space is seeking an experienced Senior Digital Backend Layout Engineer specializing in Place and Route (P&R) to join their semiconductor engineering team. In this role, you will lead and execute the backend flow of digital ASIC designs from synthesis through to GDSII. Your primary focus will be on optimizing layout for area, power, and performance while ensuring DRC/LVS compliance. You'll work closely with design and verification engineers to integrate frontend logic with backend physical design, meeting strict deadlines and quality standards for advanced semiconductor technologies.

Key responsibilities include:

• Managing end-to-end backend physical design flow
• Optimizing layout for power efficiency, timing closure, and area
• Performing Static Timing Analysis (STA) and driving timing closure
• Ensuring DRC and LVS compliance
• Utilizing industry-standard EDA tools and scripting languages
• Collaborating with cross-functional teams
• Maintaining accurate documentation and reporting

The ideal candidate will have:

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field
• 5+ years in digital backend design with experience in advanced process nodes
• Proficiency with physical design tools and scripting languages
• Strong knowledge of timing analysis, clock tree synthesis, and other relevant techniques
• Excellent communication skills

E-Space offers a dynamic work environment with opportunities for professional growth and development. They provide competitive salaries, health and wellness care options, financial solutions for the future, paid holidays, and paid time off. The company is committed to sustainability and encourages innovative thinking.

Join E-Space to make connectivity from space universally accessible, secure, and actionable while expanding global economies, protecting space and our planet, and enhancing overall quality of life.