Staff DFT Engineer

Leading chiplet startup creating technologies for chiplet-based systems with best-in-class power, area, manufacturability, and design flexibility.
Embedded
Staff Software Engineer
In-Person
6+ years of experience
Enterprise SaaS

Description For Staff DFT Engineer

Eliyan, the leading chiplet startup, is seeking a Staff DFT Engineer to join their innovative team. This role offers an exciting opportunity to work at a fast-paced early-stage startup that's creating cutting-edge technologies for chiplet-based systems. The position focuses on developing solutions with best-in-class power, area, manufacturability, and design flexibility.

As a Staff DFT Engineer, you'll be instrumental in defining and implementing critical testing frameworks including scan, BIST, and 1149 protocols, while managing test coverage reporting. You'll work alongside a cross-functional team of industry experts who approach challenges from first principles, constantly innovating to push the boundaries of what's possible in high-volume and high-performance manufacturable products.

The ideal candidate brings 6-9 years of experience with a strong educational background in Electrical Engineering (BS required, MS/PhD preferred). Your expertise should span digital and AMS circuit design techniques, DFT methodologies, and tools, with proficiency in Verilog/System Verilog and scripting. Experience with Siemens Tessent MBIST and knowledge of various IEEE standards (1500, 1149, 1687, 1838) will be highly valued.

This is an excellent opportunity for a collaborative professional who wants to make a significant impact in the chiplet technology space. The company offers a fun work environment with excellent benefits, making it an attractive opportunity for those looking to be at the forefront of semiconductor innovation.

Last updated 2 days ago

Responsibilities For Staff DFT Engineer

  • Define DFT strategy, methodologies, and implementation plan
  • Implement DFT features in RTL for digital and analog blocks
  • Run ATPG and create and simulate DFT vectors
  • Generate and insert TAP/JTAG interface for chiplet/IP designs
  • Work with Analog/Mixed Signal teams to ensure DFT coverage for high-speed interfaces
  • Work with circuit architects on boundary scan and loopback capabilities
  • Prepare vectors for post-silicon bring up
  • Report status of DFT test coverage and mitigation strategy

Requirements For Staff DFT Engineer

  • General knowledge of digital and AMS circuit design techniques
  • Broad knowledge of DFT methodologies and tools
  • Proficient in Verilog/System Verilog and scripting
  • Ability to work collaboratively with cross functional team
  • BS EE or equivalent, with 6-9 years of experience
  • Experience with Siemens Tessent MBIST, Scan Insertion and SSN flow (preferred)
  • MS/PhD EE or equivalent preferred
  • Expertise in MBIST, JTAG, IEEE1500, 1149, 1687, 1838 (preferred)

Benefits For Staff DFT Engineer

  • Excellent benefits

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