Hardware Engineer - GenAI Technical Infrastructure
Description For Hardware Engineer - GenAI Technical Infrastructure
Google DeepMind, a leading force in artificial intelligence research and development, is seeking a Senior Hardware Engineer to join their GenAI technical infrastructure research hardware team. This role presents a unique opportunity to work at the intersection of cutting-edge AI technology and hardware development, focusing on groundbreaking silicon for machine learning acceleration.
The position involves working with a diverse, interdisciplinary team of experts in machine learning, hardware, programming languages, and systems. You'll be at the forefront of developing next-generation machine learning accelerator architectures, contributing to both micro-architecture definition and RTL design. The role requires deep expertise in hardware engineering, particularly in areas such as RTL design, verification, and ASIC design flow.
As a Hardware Engineer at Google DeepMind, you'll be part of a unique culture that emphasizes long-term ambitious research and innovation. The company values diversity of experience, knowledge, and perspectives, creating an environment where groundbreaking ideas can flourish. You'll have the opportunity to work on projects that directly impact the future of AI acceleration, collaborating with some of the brightest minds in the field.
The ideal candidate should be comfortable with ambiguity and ready to tackle novel challenges in silicon design and architecture. The role offers competitive compensation, including a base salary range of $161,000 - $245,000, plus bonus, equity, and comprehensive benefits. This is an excellent opportunity for experienced hardware engineers who want to make a significant impact on the future of AI technology while working for one of the world's leading AI research organizations.
If you're passionate about pushing the boundaries of what's possible in hardware design for AI applications, have a strong background in RTL design and micro-architecture, and want to be part of shaping the future of machine learning acceleration, this role offers the perfect platform to achieve these ambitions while working on meaningful and impactful projects.
Responsibilities For Hardware Engineer - GenAI Technical Infrastructure
- Work in a fast and interdisciplinary team bringing together experts from Machine Learning, Hardware, Programming Languages and Systems
- High performance machine learning accelerator architecture, micro-architecture and RTL design
- Selection and integration of in-house and third party IP
- Exploration of various trade-offs of future architecture designs in terms of performance, power, energy, and area
- Participate in the system architecture definition and evaluation
- Collaboration with simulation and PD teams to maintain up to date cost functions for architecture evaluation
Requirements For Hardware Engineer - GenAI Technical Infrastructure
- Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience
- 7+ years of experience in RTL design in Verilog/System Verilog
- 5+ years of experience in micro-architecture definition
- 3+ years of experience in RTL design verification
- Experience with high performance compute IPs
- Experience in evaluating trade-offs such as speed, performance, power, area
- Good understanding of ASIC design flow
- Working knowledge of transformer-based large language models
- Hands-on knowledge of basic hardware requirements and building blocks of ML accelerators
Benefits For Hardware Engineer - GenAI Technical Infrastructure
- Bonus
- Equity
- Benefits Package
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