Application-Specific Integrated Circuit (ASIC) Design Verification Engineer

Google organizes the world's information and makes it universally accessible and useful, combining AI, Software, and Hardware to create helpful experiences.
$80,000 - $120,000
Embedded
Entry-Level Software Engineer
In-Person
5,000+ Employees
AI · Enterprise SaaS · Hardware

Description For Application-Specific Integrated Circuit (ASIC) Design Verification Engineer

Google is seeking an ASIC Design Verification Engineer to join their hardware team, focusing on developing custom silicon solutions for Google's direct-to-consumer products. This role combines hardware expertise with Google's cutting-edge AI and software capabilities to create innovative computing solutions. The position involves working with next-generation configurable Infrastructure IPs, interconnects, and memory subsystems.

As an ASIC Design Verification Engineer, you'll be responsible for ensuring the functionality and reliability of complex digital systems. You'll work with SystemVerilog and various verification methodologies to create and enhance verification environments, develop cross-language tools, and collaborate closely with design engineers to deliver high-quality hardware solutions.

The role offers an opportunity to work on products that impact millions of users worldwide, pushing the boundaries of hardware performance and efficiency. You'll be part of Google's mission to organize world's information and make it universally accessible, while working with state-of-the-art technology and contributing to the next generation of hardware experiences.

This position requires a strong background in electrical engineering or computer science, with experience in digital verification, RTL-level design, and standard verification methodologies. Knowledge of microprocessor cores, memory subsystems, and various interconnect protocols is essential. The ideal candidate will have experience with both pre-Silicon analysis and post-Silicon correlation, as well as expertise in building verification methodologies across simulation, emulation, and FPGA prototypes.

Last updated 3 days ago

Responsibilities For Application-Specific Integrated Circuit (ASIC) Design Verification Engineer

  • Plan and execute the verification of the next generation configurable Infrastructure Internet Protocols (IPs), interconnects and memory subsystems
  • Create and enhance constrained-random verification environments using SystemVerilog
  • Develop cross language tools and scalable verification methodologies
  • Identify and write all types of coverage measures for stimulus and corner-cases
  • Debug tests with design engineers to deliver functionally correct blocks and subsystems

Requirements For Application-Specific Integrated Circuit (ASIC) Design Verification Engineer

  • Bachelor's degree in Electrical Engineering or Computer Science, or equivalent practical experience
  • Experience in verifying digital reasoning at Register-Transfer Level (RTL) level using SystemVerilog or C/C++
  • Experience with verification components and environments in standard verification methodology
  • Experience in verifying digital systems using standard Internet Protocols (IP) components/interconnects
  • Experience with coding languages and software development frameworks

Benefits For Application-Specific Integrated Circuit (ASIC) Design Verification Engineer

Medical Insurance
401k
Parental Leave
  • Medical Insurance
  • 401k
  • Parental Leave

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