Google is seeking an ASIC Design Verification Engineer to join their hardware team focused on developing custom silicon solutions for Google's direct-to-consumer products. This role combines hardware expertise with Google's innovative approach to technology, working on products that impact millions of users worldwide.
The position requires strong expertise in formal verification, with a focus on digital logic verification at the RTL level using SystemVerilog. You'll be working with cutting-edge verification tools and methodologies, contributing to the development of next-generation hardware experiences that deliver exceptional performance and efficiency.
As an ASIC Design Verification Engineer, you'll be responsible for planning and implementing verification strategies, creating properties and constraints for digital design blocks, and utilizing advanced formal verification tools. The role demands both technical depth in hardware verification and the ability to contribute to methodology improvements.
The ideal candidate will have a strong background in Electrical Engineering or Computer Science, with specific expertise in formal verification domains. Experience with tools like JasperGold, VC Formal, or Questa Formal is highly valued, as is knowledge of formal methodology and abstraction techniques.
This is an opportunity to work with a diverse team at Google, contributing to innovative hardware solutions that power popular consumer products. You'll be part of a company that values technical excellence, creativity, and the ability to impact users' lives through technology. The role offers the chance to work on challenging problems at scale, with access to Google's vast resources and expertise in AI, software, and hardware integration.