Google is seeking an ASIC Design Verification Engineer to join their TPU (Tensor Processing Unit) team, working on cutting-edge AI/ML hardware acceleration. This role is crucial in shaping the future of Google's custom silicon solutions that power their most demanding AI/ML applications.
As part of the Technical Infrastructure team, you'll be responsible for developing and verifying ASICs used to accelerate computation in data centers. Your work will directly impact the architecture, documentation, and verification of the next generation of data center accelerators. The role involves working with SystemVerilog and Universal Verification Methodology (UVM) to create robust verification environments.
The position offers an exciting opportunity to work with a diverse team that pushes boundaries in custom silicon development. You'll be verifying complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems. The role combines technical expertise in ASIC verification with the chance to contribute to products used by millions worldwide.
This is an ideal position for someone with strong verification experience who wants to work at the forefront of AI hardware development. You'll collaborate with design engineers, participate in project definition, and be involved in silicon bringup. The role offers competitive compensation, including base salary, bonus, equity, and comprehensive benefits, reflecting Google's commitment to attracting top talent in the field.
Working at Google means being part of a company that values diversity, inclusion, and innovation. You'll be contributing to technology that powers some of the most advanced AI applications while working alongside industry experts in a supportive and collaborative environment.