ASIC Design Verification Engineer, TPU Compute

Google is a global technology leader that develops innovative products and services used by billions of people.
$127,000 - $187,000
Backend
Mid-Level Software Engineer
In-Person
5,000+ Employees
3+ years of experience
AI

Description For ASIC Design Verification Engineer, TPU Compute

Google is seeking an ASIC Design Verification Engineer to join their TPU (Tensor Processing Unit) team, working on cutting-edge AI/ML hardware acceleration. This role offers an exciting opportunity to shape the future of AI hardware, developing custom silicon solutions that power Google's most demanding AI/ML applications. As part of a diverse team, you'll be responsible for verifying complex digital designs, focusing on TPU architecture and its integration within AI/ML systems.

The position involves working on ASICs used to accelerate computation in data centers, with responsibilities spanning project definition, design verification, and silicon bringup. You'll participate in the architecture, documentation, and verification of next-generation data center accelerators. The role requires expertise in SystemVerilog and Universal Verification Methodology (UVM), with a focus on creating comprehensive verification environments and ensuring thorough coverage of all design aspects.

This is an excellent opportunity for someone with a strong background in electrical engineering or computer science who wants to work at the intersection of hardware and AI. You'll be part of Google's Technical Infrastructure team, which builds and maintains the foundation for Google's entire product portfolio. The role offers competitive compensation, including base salary, bonus, equity, and comprehensive benefits.

The ideal candidate will have experience with industry-standard simulators, revision control systems, and regression systems, along with a deep understanding of the full verification lifecycle. You'll work closely with design engineers, contributing to the development of next-generation technology that powers millions of users worldwide. This role combines technical expertise with the opportunity to impact the future of AI hardware acceleration at one of the world's leading technology companies.

Last updated 2 months ago

Responsibilities For ASIC Design Verification Engineer, TPU Compute

  • Plan the verification of digital design blocks, understand the design specification, and interact with design engineers to identify important verification scenarios
  • Create a constrained-random verification environment using SystemVerilog and Universal Verification Methodology (UVM)
  • Identify and write all types of coverage measures for stimulus and corner-cases
  • Debug tests with design engineers to deliver correct design blocks
  • Close coverage measures to identify verification holes and to show progress towards tape-out

Requirements For ASIC Design Verification Engineer, TPU Compute

  • Bachelor's degree in Computer Science, Electrical Engineering, a related field, or equivalent practical experience
  • 3 years of experience with industry standard tools, languages and methodologies relevant to the development of silicon-based ICs and chips
  • Experience with SystemVerilog (i.e., SystemVerilog Assertions or functional coverage)

Benefits For ASIC Design Verification Engineer, TPU Compute

Medical Insurance
Dental Insurance
Vision Insurance
401k
  • bonus
  • equity
  • benefits package

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