ASIC DFT Engineer, Silicon

Google is seeking an ASIC DFT Engineer to join their Devices & Services team, focusing on developing custom silicon solutions for Google's direct-to-consumer products. This role is part of a diverse team that pushes boundaries in hardware innovation, working on products used by millions globally.

The position involves working with DFT engineers, RTL, and Physical Designer Engineers to develop and implement testing solutions for complex silicon designs. You'll be responsible for working on Subsystem level DFT SCAN and MBIST Architecture with multiple voltage and power domains, while also creating automated testing workflows.

As part of Google's hardware team, you'll contribute to the next generation of hardware experiences, focusing on performance, efficiency, and integration. The role combines technical expertise in DFT (Design for Testability) with software development skills, particularly in Python and TCL scripting.

The ideal candidate should have a strong foundation in Electrical Engineering or Computer Science, with specific experience in DFT flows and methodology. You'll be working in Bengaluru, contributing to Google's mission of organizing world's information and making it universally accessible.

This position offers the opportunity to work on cutting-edge hardware solutions, collaborating with talented engineers across different specialties. You'll be part of Google's commitment to innovation in consumer hardware products, working in an environment that values diversity, equality, and inclusion.

The role requires both technical expertise and collaborative skills, as you'll be working closely with various engineering teams. Your work will directly impact the quality and testability of Google's hardware products, making them more reliable and efficient for users worldwide.